公开(公告)号：US20230378183A1

公开(公告)日：2023-11-23

申请号：US18231322

申请日：2023-08-08

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anthony K. STAMPER ,  Uzma RANA ,  Siva P. ADUSUMILLI ,  Steven M. SHANK

IPC: H01L27/12 ,  H01L29/45 ,  H01L21/84 ,  H01L21/28 ,  H01L21/285 ,  H01L29/49

CPC classification number: H01L27/1203 ,  H01L29/45 ,  H01L21/84 ,  H01L21/28052 ,  H01L21/28518 ,  H01L29/4933

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to field effect transistors and methods of manufacture. The structure includes: at least one gate structure comprising source/drain regions; and at least one isolation structure perpendicular to the at least one gate structure and within the source/drain regions.

公开(公告)号：US20220384659A1

公开(公告)日：2022-12-01

申请号：US17330780

申请日：2021-05-26

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anthony K. STAMPER ,  Uzma RANA ,  Steven M. SHANK ,  Mark D. LEVY

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/66

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to field effect transistors and methods of manufacture. The structure includes: at least one gate structure having source/drain regions; at least one isolation structure within the source/drain regions in a substrate material; and semiconductor material on a surface of the at least one isolation structure in the source/drain regions.

公开(公告)号：US20220122968A1

公开(公告)日：2022-04-21

申请号：US17075056

申请日：2020-10-20

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor JAIN ,  John J. ELLIS-MONAGHAN ,  Anthony K. STAMPER ,  Steven M. SHANK ,  John J. PEKARIK

IPC: H01L27/082 ,  H01L29/06 ,  H01L29/737 ,  H01L27/06

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors (HBTs) with a buried trap rich isolation region and methods of manufacture. The structure includes: a first heterojunction bipolar transistor; a second heterojunction bipolar transistor; and a trap rich isolation region embedded within a substrate underneath both the first heterojunction bipolar transistor and the second heterojunction bipolar transistor.

公开(公告)号：US20220028992A1

公开(公告)日：2022-01-27

申请号：US17498241

申请日：2021-10-11

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anthony K. STAMPER ,  Steven M. SHANK ,  Siva P. ADUSUMILLI ,  Michel J. ABOU-KHALIL

IPC: H01L29/423 ,  H01L29/78 ,  H01L29/66

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to vertically stacked field effect transistors and methods of manufacture. The structure includes: at least one lower gate structure on a bottom of a trench formed in substrate material; insulator material partially filling trench and over the at least one lower gate structure; an epitaxial material on the insulator material and isolated from sidewalls of the trench; and at least one upper gate structure stacked vertically above the at least one lower gate structure and located on the epitaxial material.

公开(公告)号：US20210104621A1

公开(公告)日：2021-04-08

申请号：US17124012

申请日：2020-12-16

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor JAIN ,  Anthony K. STAMPER ,  Steven M. SHANK ,  John J. PEKARIK

IPC: H01L29/737 ,  H01L29/06

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a heterojunction bipolar transistor having an emitter base junction with a silicon-oxygen lattice interface and methods of manufacture. The device includes: a collector region buried in a substrate; shallow trench isolation regions, which isolate the collector region buried in the substrate; a base region on the substrate and over the collector region; an emitter region composed of a single crystalline of semiconductor material and located over with the base region; and an oxide interface at a junction of the emitter region and the base region.

公开(公告)号：US20220123107A1

公开(公告)日：2022-04-21

申请号：US17074891

申请日：2020-10-20

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor JAIN ,  Anthony K. STAMPER ,  John J. ELLIS-MONAGHAN ,  Steven M. SHANK ,  Rajendran KRISHNASAMY

IPC: H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/737 ,  H01L29/165 ,  H01L21/763

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors (HBTs) with a buried trap rich region and methods of manufacture. The structure includes: a trap rich isolation region embedded within the bulk substrate; and a heterojunction bipolar transistor above the trap rich isolation region, with its sub-collector region separated by the trap rich isolation region by a layer of the bulk substrate.

公开(公告)号：US20220115262A1

公开(公告)日：2022-04-14

申请号：US17069098

申请日：2020-10-13

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Uzma RANA ,  Anthony K. STAMPER ,  Steven M. SHANK ,  Brett T. CUCCI

IPC: H01L21/76 ,  H01L21/26

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to bulk wafer switch isolation structures and methods of manufacture. The structure includes: a bulk substrate material; an active region on the bulk substrate material; an inactive region adjacent to the active region; and an amorphous material covering the bulk substrate material in the inactive region, which is adjacent to the active region.

公开(公告)号：US20220093731A1

公开(公告)日：2022-03-24

申请号：US17028178

申请日：2020-09-22

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Anthony K. STAMPER ,  Siva P. ADUSUMILLI ,  Bruce W. PORTH ,  John J. ELLIS-MONAGHAN

IPC: H01L29/06 ,  H01L21/02 ,  H01L21/764 ,  H01L21/762

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a semiconductor on insulator substrate with cavity structures and methods of manufacture. The structure includes: a bulk substrate with at least one rectilinear cavity structure; an insulator material sealing the at least one rectilinear cavity structure; and a buried insulator layer on the bulk substrate and over the at least one rectilinear cavity structure.

公开(公告)号：US20220068975A1

公开(公告)日：2022-03-03

申请号：US17003179

申请日：2020-08-26

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Siva P. ADUSUMILLI ,  Anthony K. STAMPER ,  Bruce W. PORTH ,  John J. ELLIS-MONAGHAN

IPC: H01L27/12 ,  H01L29/06 ,  H01L21/762

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a wafer with localized cavity structures and methods of manufacture. A structure includes a bulk substrate with localized semiconductor on insulator (SOI) regions and bulk device regions, the localized SOI regions includes multiple cavity structures and substrate material of the bulk substrate.

公开(公告)号：US20220262900A1

公开(公告)日：2022-08-18

申请号：US17738179

申请日：2022-05-06

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Uzma RANA ,  Anthony K. STAMPER ,  Johnatan A. KANTAROVSKY ,  Steven M. SHANK ,  Siva P. ADUSUMILLI

IPC: H01L29/06 ,  H01L21/762 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/763 ,  H01L29/10

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a transistor with an embedded isolation layer in a bulk substrate and methods of manufacture. The structure includes: a bulk substrate; an isolation layer embedded within the bulk substrate and below a top surface of the bulk substrate; a deep trench isolation structure extending through the bulk substrate and contacting the embedded isolation layer; and a gate structure over the top surface of the bulk substrate and vertically spaced away from the embedded isolation layer, the deep trench isolation structure and the embedded isolation layer defining an active area of the gate structure in the bulk substrate.