TRANSISTOR WITH EMBEDDED ISOLATION LAYER IN BULK SUBSTRATE

    公开(公告)号:US20220028971A1

    公开(公告)日:2022-01-27

    申请号:US16939213

    申请日:2020-07-27

    摘要: The present disclosure relates to semiconductor structures and, more particularly, to a transistor with an embedded isolation layer in a bulk substrate and methods of manufacture. The structure includes: a bulk substrate; an isolation layer embedded within the bulk substrate and below a top surface of the bulk substrate; a deep trench isolation structure extending through the bulk substrate and contacting the embedded isolation layer; and a gate structure over the top surface of the bulk substrate and vertically spaced away from the embedded isolation layer, the deep trench isolation structure and the embedded isolation layer defining an active area of the gate structure in the bulk substrate.

    FIELD EFFECT TRANSISTOR
    8.
    发明申请

    公开(公告)号:US20220384659A1

    公开(公告)日:2022-12-01

    申请号:US17330780

    申请日:2021-05-26

    摘要: The present disclosure relates to semiconductor structures and, more particularly, to field effect transistors and methods of manufacture. The structure includes: at least one gate structure having source/drain regions; at least one isolation structure within the source/drain regions in a substrate material; and semiconductor material on a surface of the at least one isolation structure in the source/drain regions.

    VERTICALLY STACKED FIELD EFFECT TRANSISTORS

    公开(公告)号:US20220028992A1

    公开(公告)日:2022-01-27

    申请号:US17498241

    申请日:2021-10-11

    摘要: The present disclosure relates to semiconductor structures and, more particularly, to vertically stacked field effect transistors and methods of manufacture. The structure includes: at least one lower gate structure on a bottom of a trench formed in substrate material; insulator material partially filling trench and over the at least one lower gate structure; an epitaxial material on the insulator material and isolated from sidewalls of the trench; and at least one upper gate structure stacked vertically above the at least one lower gate structure and located on the epitaxial material.