公开(公告)号：US5943110A

公开(公告)日：1999-08-24

申请号：US88598

申请日：1998-06-01

申请人： Eiji Yoda ,  Takehiro Toyooka ,  Tadahiro Kaminade ,  Takuya Matsumoto

发明人： Eiji Yoda ,  Takehiro Toyooka ,  Tadahiro Kaminade ,  Takuya Matsumoto

IPC分类号： G02F1/13 ,  C09K19/38 ,  G02F1/1335 ,  G02F1/13363 ,  G02F1/139 ,  G02F1/141

CPC分类号： G02F1/133632 ,  G02F1/1396 ,  G02F2413/105

摘要： A liquid crystal display device having improved and broadened viewing angle characteristics. The device includes a liquid crystal cell of the twisted nematic type for driving sandwiched by a pair of upper and lower polarizing plates in which at least one compensating film is inserted between the liquid crystal cell and the upper polarizing plate or between the liquid crystal cell and the lower polarizing plate. Alternatively, two compensating films are respectively inserted between the liquid crystal cell and the upper polarizing plate and between the liquid crystal cell and the lower polarizing plate. The compensating film consists essentially of a liquid crystalline polymer showing optically a positive uniaxiality, the liquid crystalline polymer being fixed in a nematic hybrid orientational order. The device is further characterized by an angle between a tilt direction of the compensating film and a pretilt direction on a liquid crystal cell substrate opposed to a substrate for the liquid crystal cell for driving closest to the compensating film in the range of 165.degree. and 195.degree. C.

摘要翻译： 一种液晶显示装置，其具有改进的和加宽的视角特性。 该装置包括扭转向列型的液晶单元，用于驱动夹在一对上下偏振板之间，其中至少一个补偿膜插入在液晶单元和上偏振板之间或液晶单元与 下偏振片。 或者，两个补偿膜分别插入在液晶单元和上偏振板之间以及液晶单元和下偏振板之间。 补偿膜基本上由液晶聚合物基本上由光学上显示正单轴性组成，液晶聚合物以向列混合取向顺序固定。 该装置的特征还在于，补偿膜的倾斜方向与液晶单元基板的与用于最靠近补偿膜驱动的液晶单元的基板相对的165°和195°范围内的倾斜方向之间的角度 DEG C.

公开(公告)号：US06452115B2

公开(公告)日：2002-09-17

申请号：US09781302

申请日：2001-02-13

申请人： Michio Horiuchi ,  Eiji Yoda ,  Chiaki Takubo

发明人： Michio Horiuchi ,  Eiji Yoda ,  Chiaki Takubo

IPC分类号： H51R909

CPC分类号： H05K1/112 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/15173 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/0298 ,  H05K2201/09227 ,  H05K2201/10734

摘要： A multi-layer circuit board for mounting an electronic part such as a semiconductor chip having as many pins as 40×40 pins arranged as an array on the side of the mounting surface or a semiconductor device has a plurality of layers, each layer disposed one above another and containing lands arranged as an array disposed at an angle to the edge of the mounting surface. On each layer a plurality of the lands have connected thereto circuits extending from the lands to the edge of the mounting surface, and also lands not connected to circuits. Those lands not connected to circuits are connected with via holes to orther layers. The numbers (n−2) of lands and the position of lands connected to circuits on a layer is defined where n is the smallest integer that satisfies the equation m≧(k+1) wherein m={(land pitch)×(n−1)−(land diameter)−(space between patterns)}÷(pattern width+space between patterns) and k=&agr;(n−1)+(n−2).

摘要翻译： 用于安装诸如半导体芯片的电子部件的多层电路板，具有作为阵列布置成安装面侧面的40×40引脚的半导体芯片或半导体器件的半导体芯片具有多层，每层设置在另一层上 并且包括布置成与安装表面的边缘成一定角度设置的阵列。 在每个层上，多个焊盘已经连接到从焊盘延伸到安装表面的边缘的电路，并且还没有连接到电路。 未连接到电路的那些焊盘与通孔连接到其他层。 定义了土地的数量（n-2）和连接到层上的电路的土地的位置，其中n是满足等式m> =（k + 1）的最小整数，其中

公开(公告)号：US06229099B1

公开(公告)日：2001-05-08

申请号：US09092845

申请日：1998-06-05

申请人： Michio Horiuchi ,  Eiji Yoda ,  Chiaki Takubo

发明人： Michio Horiuchi ,  Eiji Yoda ,  Chiaki Takubo

IPC分类号： H01R909

CPC分类号： H05K1/112 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/15173 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/0298 ,  H05K2201/09227 ,  H05K2201/10734

摘要： The invention is concerned with a multi-layer circuit board for mounting an electronic part such as a semiconductor chip having as many pins as 40×40 pins arranged as an array on the side of the mounting surface or a semiconductor device having lands arranged as an array on the side of the mounting surface. The invention provides a multi-layer circuit board with particular pad spacing and configuration which make it possible to mount an electronic part such as a semiconductor chip or a semiconductor device while reducing the number of circuit board layers that are laminated one upon the other.

摘要翻译： 本发明涉及用于安装诸如半导体芯片的电子部件的多层电路板，所述半导体芯片具有作为阵列布置为安装表面侧面的40×40个引脚的引脚，或者具有作为阵列布置的阵列的半导体器件 安装面的一侧。 本发明提供了具有特定焊盘间隔和配置的多层电路板，其可以在减少彼此层叠的电路板层的数量的同时，安装诸如半导体芯片或半导体器件的电子部件。