METHODS AND SYSTEMS FOR DATA TRANSMISSION

    公开(公告)号:US20210083801A1

    公开(公告)日:2021-03-18

    申请号:US17108386

    申请日:2020-12-01

    Abstract: The present invention relates to data communication systems and methods thereof. More specifically, embodiments of the present invention provide a data transmission method. Data are encoded with staircase encoder, and staircase coded blocks are first interleaved then combined into outer code frames. Code frames additionally include sync words and padding bits. A second interleaving is applied to the bits of the code frames, and Hamming encoding is performed on the output of the second interleaver. Hamming codewords are Gray-mapped to dual-polarized quadrature-amplitude-modulation (DP-QAM) symbols, and a third interleaving of the symbols from a set of successive Hamming codewords is performed. Pilot symbols are inserted periodically into the stream of DP-QAM symbols. There are other embodiments as well.

    APPARATUS AND METHOD FOR COMMUNICATING DATA OVER AN OPTICAL CHANNEL

    公开(公告)号:US20190319741A1

    公开(公告)日:2019-10-17

    申请号:US16451986

    申请日:2019-06-25

    Abstract: An optical module processes first FEC (Forward Error Correction) encoded data produced by a first FEC encoder. The optical module has a second FEC encoder for further coding a subset of the first FEC encoded data to produce second FEC encoded data. The optical module also has an optical modulator for modulating, based on a combination of the second FEC encoded data and a remaining portion of the first FEC encoded data that is not further coded, an optical signal for transmission over an optical channel. The second FEC encoder is an encoder for an FEC code that has a bit-level trellis representation with a number of states in any section of the bit-level trellis representation being less than or equal to 64 states. In this manner, the second FEC encoder has relatively low complexity (e.g. relatively low transistor count) that can reduce power consumption for the optical module.

    SOFT FEC WITH PARITY CHECK
    14.
    发明申请

    公开(公告)号:US20190268091A1

    公开(公告)日:2019-08-29

    申请号:US16403408

    申请日:2019-05-03

    Abstract: The present invention is directed to data communication systems and techniques thereof. More specifically, embodiments of the present invention provide an FEC encoder that generates parity symbols that are embedded into FEC blocks. An FEC decoder determines whether to perform error correction based on the parity symbols. When performing error correction, the decoder selects a worst symbol from a segment of symbols, and the worst symbol is corrected. There are other embodiments as well.

    FORWARD ERROR CORRECTION (FEC) EMULATOR
    15.
    发明申请

    公开(公告)号:US20190165806A1

    公开(公告)日:2019-05-30

    申请号:US16262148

    申请日:2019-01-30

    Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).

    MULTIPLEXERS WITH PROTECTION SWITCHING
    16.
    发明申请

    公开(公告)号:US20190052513A1

    公开(公告)日:2019-02-14

    申请号:US15987808

    申请日:2018-05-23

    Abstract: The present invention is directed to data communication. In certain embodiments, the present invention provides switching mechanism for choosing between redundant communication links. Data received from a first set of communication links are processed to have alignment markers removed, and first figure of merit value is determined based on the data without alignment markers. Similarly, a second figure of merit value is determined for the data received from the second set of communication links. A switch selects between the first set of communication links and the second set of communication links based on their respective figure of merit values. Alignment markers are inserted into the data transmitted through the selected set of data links. There are other embodiments as well.

    CIRCUIT AND METHOD FOR PERFORMING ADAPTION ON ALL RECEIVER BRANCHES
    19.
    发明申请
    CIRCUIT AND METHOD FOR PERFORMING ADAPTION ON ALL RECEIVER BRANCHES 有权
    在所有接收器分支上执行自适应的电路和方法

    公开(公告)号:US20160380784A1

    公开(公告)日:2016-12-29

    申请号:US15260692

    申请日:2016-09-09

    Abstract: Receiver circuitry is disclosed that can take circuit branches offline to possibly adapt an offset value. In one embodiment, a circuit in a receiver has at least two branches. Each branch includes an adjustor to adjust the branch signal by an offset value. Selection circuitry takes one of the branches offline by selecting the output of that branch as an offline value, and by selecting the output of one or more of the other branches as a data decision value. The selection circuitry changes which branch is taken offline during the operation of the circuit. When a branch is taken offline, an offset value associated with that branch may be updated, if necessary.

    Abstract translation: 公开了可以使电路分支离线以适应偏移值的接收器电路。 在一个实施例中,接收器中的电路具有至少两个分支。 每个分支包括调整器,以通过偏移值来调整分支信号。 选择电路通过选择该分支的输出作为离线值,并通过选择一个或多个其他分支的输出作为数据判定值,使其中一个分支离线。 选择电路在电路运行期间改变哪个分支脱机。 当分支脱机时,如果需要,可以更新与该分支相关联的偏移值。

Patent Agency Ranking