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公开(公告)号：US20150169384A1
公开(公告)日：2015-06-18
申请号：US14635790
申请日：2015-03-02
Applicant: Intel Corporation
Inventor： Suresh Srinivas , Stephen H. Dohrmann , Mingqiu Sun , Uma Srinivasan , Ravi Rajwar , Konrad K. Lai
IPC: G06F9/52
CPC classification number: G06F9/528 , G06F8/458 , G06F9/3842 , G06F9/45516 , G06F9/526 , G06F17/30168 , G06F17/30362 , Y10S707/99938
Abstract: Example methods and apparatus to manage object locks are disclosed. A disclosed example method includes intercepting a processor request to apply the lock on the object, identifying a performance history of the object based on a number of instances of contention, reducing computing resources of the processor by, when the number of instances is below a threshold value, generating a lock bypass for the object to cause speculative execution of target code within the object, and preventing speculative execution by applying the lock on the object when the number of instances is above the threshold value.
Abstract translation: 公开了用于管理对象锁的示例性方法和装置。 所公开的示例性方法包括拦截处理器请求以对对象施加锁定，基于竞争的多个实例来识别对象的性能历史，当实例数低于阈值时，减少处理器的计算资源 产生对象的锁旁路，以引起对象内的目标代码的推测执行，并且当实例数高于阈值时，通过对对象应用锁来防止推测执行。
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公开(公告)号：US11656853B2
公开(公告)日：2023-05-23
申请号：US17885509
申请日：2022-08-10
Applicant: INTEL CORPORATION
Inventor： Mingqiu Sun , Rajesh Poornachandran , Vincent J. Zimmer , Ned M. Smith , Gopinatth Selvaraje
CPC classification number: G06F8/41 , G06F9/455 , G06F9/45516 , G06F9/5044 , G06F21/00 , G06F21/53 , G06F21/57 , G06F21/6281 , G06F9/45533
Abstract: Various embodiments are generally directed to techniques for supporting the distributed execution of a task routine among multiple secure controllers incorporated into multiple computing devices. An apparatus includes a first processor component and first secure controller of a first computing device, where the first secure controller includes: a selection component to select the first secure controller or a second secure controller of a second computing device to compile a task routine based on a comparison of required resources to compile the task routine and available resources of the first secure controller; and a compiling component to compile the task routine into a first version of compiled routine for execution within the first secure controller by the first processor component and a second version for execution within the second secure controller by a second processor component in response to selection of the first secure controller. Other embodiments are described and claimed.
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公开(公告)号：US20190102537A1
公开(公告)日：2019-04-04
申请号：US15720083
申请日：2017-09-29
Applicant: Intel Corporation
Inventor： Mingwei Zhang , Mingqiu Sun , Ravi L. Sahita , Chunhui Zhang , Xiaoning Li
Abstract: Technologies for untrusted code execution include a computing device having a processor with sandbox support. The computing device executes code included in a native domain in a non-privileged, native processor mode. The computing device may invoke a sandbox jump processor instruction during execution of the code in the native domain to enter a sandbox domain. The computing device executes code in the sandbox domain in a non-privileged, sandbox processor mode in response to invoking the sandbox jump instruction. While executing in the sandbox processor mode, the processor denies access to memory outside of the sandbox domain and may deny execution of one or more prohibited instructions. From the sandbox domain, the computing device may execute a sandbox exit instruction to exit the sandbox domain and resume execution in the native domain. The computing device may execute processor instructions to configure the sandbox domain. Other embodiments are described and claimed.
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公开(公告)号：US10185547B2
公开(公告)日：2019-01-22
申请号：US14751519
申请日：2015-06-26
Applicant: INTEL CORPORATION
Inventor： Mingqiu Sun , Rajesh Poornachandran , Vincent J. Zimmer , Ned M. Smith , Gopinatth Selvaraje
Abstract: Various embodiments are generally directed to techniques for supporting the distributed execution of a task routine among multiple secure controllers incorporated into multiple computing devices. An apparatus includes a first processor component and first secure controller of a first computing device, where the first secure controller includes: a selection component to select the first secure controller or a second secure controller of a second computing device to compile a task routine based on a comparison of required resources to compile the task routine and available resources of the first secure controller; and a compiling component to compile the task routine into a first version of compiled routine for execution within the first secure controller by the first processor component and a second version for execution within the second secure controller by a second processor component in response to selection of the first secure controller. Other embodiments are described and claimed.
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公开(公告)号：US20180329729A1
公开(公告)日：2018-11-15
申请号：US15590781
申请日：2017-05-09
Applicant: INTEL CORPORATION
Inventor： Mingqiu Sun , Noah Zentzis , Vincent J. Zimmer , Peggy J. Irelan , Timothy E. Abels , Gopinatth Selvaraje , Rajesh Poornachandran
Abstract: A microservice infrastructure that securely maintains the currency of computing platform microservices implemented within a process virtual machine is provided. The computing platform microservices maintained by the infrastructure may include protected methods that provide and control access to components of the underlying computing environment. These components may include, for example, storage devices, peripherals, and network interfaces. By providing a software-defined microservice layer between these hardware components and workflows that specify high-level application logic, the embodiments disclosed herein have enhanced flexibility and scalability when compared to conventional technology.
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Patent Agency Ranking
公开(公告)号：US20180227391A1
公开(公告)日：2018-08-09
申请号：US15428274
申请日：2017-02-09
Applicant: Intel Corporation
Inventor： Vincent J. Zimmer , Rajesh Poornachandran , Ned M. Smith , Mingqiu Sun , Gopinatth Selvaraje
CPC classification number: H04L67/34 , H04L41/082 , H04L63/123 , H04L63/1433
Abstract: An automated method for distributed and redundant firmware evaluation involves using a first interface that is provided by system firmware of a client device to obtain, at an evaluation server, a first firmware resource table (FRT) from the client device. The evaluation server also uses a second interface that is provided by a component of the client device other than the system firmware to obtain a second FRT from the client device. The evaluation server automatically uses the first and second FRTs to identify a trustworthy FRT among the first and second FRTs. The evaluation server automatically uses the trustworthy FRT to determine whether the client device should be updated. For instance, the evaluation server may automatically use the trustworthy FRT to determine whether firmware in the client device should be updated. Other embodiments are described and claimed.
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公开(公告)号：US20180198622A1
公开(公告)日：2018-07-12
申请号：US15917360
申请日：2018-03-09
Applicant: Intel Corporation
Inventor： Vincent J. Zimmer , Rajesh Poornachandran , Mingqiu Sun , Gopinatth Selvaraje
CPC classification number: H04L9/3234 , G06F9/226 , G06F9/30043 , G06F9/3877 , G06F9/45558 , G06F21/53 , G06F21/577 , G06F21/602 , G06F2009/45587 , G06F2221/034 , G06F2221/2149
Abstract: Methods and apparatus to provide isolated execution environments are disclosed. An example apparatus includes a machine status register to determine whether excess micro operations are available during an instruction cycle to execute a pico-application in response to a request for computing provided by a host application. The pico-application is a fragment of microcode. The microcode comprises a plurality of micro operations. The machine status register is also to determine whether space is available in a memory to load the pico-application. The example apparatus also includes a loader to load a virtual machine and the pico-application into the memory in response to the excess micro operations and the space in the memory being available. The virtual machine validates the pico-application and loads the pico-application into the memory. The example apparatus also includes a processor to execute the pico-application via the excess micro operations.
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公开(公告)号：US09632757B2
公开(公告)日：2017-04-25
申请号：US14778521
申请日：2014-09-10
Applicant: Intel Corporation
Inventor： Lei luc Shi , Xin Wang , Mingqiu Sun , Ligang Wang , Gopinatth Selvaraje
IPC: G06F9/44
Abstract: Apparatuses, methods and storage media associated with generating a custom class library are disclosed herein. In embodiments, an apparatus may include an analyzer configured to receive a workload for a device and a class library used by the workload, analyze the workload and class library, identify one or more workload full API call chains, and generate information about the one or more workload full API call chains. Further, the apparatus may include a generator to generate from the class library, a custom class library for the workload that is smaller than the class library, based at least in part on the one or more workload full API call chains. Other embodiments may be disclosed or claimed.
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公开(公告)号：US20170093578A1
公开(公告)日：2017-03-30
申请号：US14864085
申请日：2015-09-24
Applicant: Intel Corporation
Inventor： Vincent J. Zimmer , Rajesh Poornachandran , Mingqiu Sun , Gopinatth Selvaraje
CPC classification number: H04L9/3234 , G06F9/226 , G06F9/30043 , G06F9/3877 , G06F9/45558 , G06F21/53 , G06F21/577 , G06F21/602 , G06F2009/45587 , G06F2221/034 , G06F2221/2149
Abstract: Methods and apparatus to provide isolated execution environments are disclosed. In some examples, the methods and apparatus identify a request from a host application. In some examples, the methods and apparatus, in response to identifying the request from the host application, load a microcode application into memory when excess micro operations exist in a host instruction set architecture, the microcode application being a fragment of code. In some examples, the methods and apparatus execute the microcode application. In some examples, the methods and apparatus, in response to completed execution of the microcode application, unload the microcode application from memory.
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公开(公告)号：US12056380B2
公开(公告)日：2024-08-06
申请号：US18008109
申请日：2020-07-02
Applicant: Intel Corporation
Inventor： Bin Yang , Jia Bao , Ying Huang , Yao Zu Dong , Yong Yao , Fengqian Gao , Mohammad Haghighat , Mingqiu Sun , Zhen Zhou , Tao Xu
IPC: G06F3/06
CPC classification number: G06F3/0641 , G06F3/0608 , G06F3/067
Abstract: Methods, apparatus, systems and articles of manufacture to deduplicate duplicate memory in a cloud-computing environment are disclosed herein. An example apparatus to deduplicate duplicate memory comprises a parser to parse process information corresponding to instances of an application, a group generator to group process information into application groups based on the process information indicating instances corresponding to the same directory paths and application names, a data structure generator to generate a pair of binary search trees for an application group, and a merge controller to deduplicate duplicate memory contents detected in the application group.
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