公开(公告)号：US20220238402A1

公开(公告)日：2022-07-28

申请号：US17720202

申请日：2022-04-13

Applicant: Intel Corporation

Inventor： Mitul MODI ,  Robert L. SANKMAN ,  Debendra MALLIK ,  Ravindranath V. MAHAJAN ,  Amruthavalli P. ALUR ,  Yikang DENG ,  Eric J. LI

IPC: H01L23/13 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065 ,  H01L25/18 ,  H01L25/00

Abstract: An apparatus is provided which comprises: a plurality of dielectric layers forming a substrate, a plurality of first conductive contacts on a first surface of the substrate, a cavity in the first surface of the substrate defining a second surface parallel to the first surface, a plurality of second conductive contacts on the second surface of the substrate, one or more integrated circuit die(s) coupled with the second conductive contacts, and mold material at least partially covering the one or more integrated circuit die(s) and the first conductive contacts. Other embodiments are also disclosed and claimed.

公开(公告)号：US20210305132A1

公开(公告)日：2021-09-30

申请号：US16828405

申请日：2020-03-24

Applicant: Intel Corporation

Inventor： Omkar KARHADE ,  Digvijay RAORANE ,  Sairam AGRAHARAM ,  Nitin DESHPANDE ,  Mitul MODI ,  Manish DUBEY ,  Edvin CETEGEN

IPC: H01L23/482 ,  H01L23/538 ,  H01L23/495

Abstract: Embodiments disclosed herein include multi-die packages with open cavity bridges. In an example, an electronic apparatus includes a package substrate having alternating metallization layers and dielectric layers. The package substrate includes a first plurality of substrate pads and a second plurality of substrate pads. The package substrate also includes an open cavity between the first plurality of substrate pads and the second plurality of substrate pads, the open cavity having a bottom and sides. The electronic apparatus also includes a bridge die in the open cavity, the bridge die including a first plurality of bridge pads, a second plurality of bridge pads, and conductive traces. An adhesive layer couples the bridge die to the bottom of the open cavity. A gap is laterally between the bridge die and the sides of the open cavity, the gap surrounding the bridge die.

公开(公告)号：US20210233867A1

公开(公告)日：2021-07-29

申请号：US16752457

申请日：2020-01-24

Applicant: Intel Corporation

Inventor： Bassam ZIADEH ,  Joseph VAN NAUSDLE ,  Zhou YANG ,  William J. LAMBERT ,  Mitul MODI

IPC: H01L23/00 ,  H01L25/065 ,  H01L23/538 ,  H01L21/50

Abstract: Embodiments herein describe techniques for an IC package including a supporting layer having a first zone and a second zone. An electronic component is placed above the first zone of the supporting layer. An underfill material is formed above the first zone of the supporting layer, around or below the electronic component to support the electronic component. The second zone of the supporting layer includes a base area and multiple micro-pillars above the base area, where any two micro-pillars of the multiple micro-pillars are separated by a gap in between. The second zone has a hydrophobic surface including surfaces of the multiple micro-pillars and surfaces of the base area. The second zone is a keep out zone to prevent the underfill material from entering the second zone. Other embodiments may be described and/or claimed.