公开(公告)号：US20220199503A1

公开(公告)日：2022-06-23

申请号：US17129846

申请日：2020-12-21

Applicant: Intel Corporation

Inventor： Manish DUBEY ,  Guruprasad ARAKERE ,  Deepak KULKARNI ,  Sairam AGRAHARAM ,  Wei-Lun K. JEN ,  Numair AHMED ,  Kousik GANESAN ,  Amol D. JADHAV ,  Kyu-Oh LEE

IPC: H01L23/498 ,  H01L21/48

Abstract: Embodiments disclosed herein include electronic packages and methods of forming such electronic packages. In an embodiment, an electronic package comprises a package substrate with a die side and a land side. In an embodiment, a pad is on the land side. In an embodiment, a dielectric layer covers sidewalls of the pad, and a surface finish is over an exposed surface of the pad.

公开(公告)号：US20210305132A1

公开(公告)日：2021-09-30

申请号：US16828405

申请日：2020-03-24

Applicant: Intel Corporation

Inventor： Omkar KARHADE ,  Digvijay RAORANE ,  Sairam AGRAHARAM ,  Nitin DESHPANDE ,  Mitul MODI ,  Manish DUBEY ,  Edvin CETEGEN

IPC: H01L23/482 ,  H01L23/538 ,  H01L23/495

Abstract: Embodiments disclosed herein include multi-die packages with open cavity bridges. In an example, an electronic apparatus includes a package substrate having alternating metallization layers and dielectric layers. The package substrate includes a first plurality of substrate pads and a second plurality of substrate pads. The package substrate also includes an open cavity between the first plurality of substrate pads and the second plurality of substrate pads, the open cavity having a bottom and sides. The electronic apparatus also includes a bridge die in the open cavity, the bridge die including a first plurality of bridge pads, a second plurality of bridge pads, and conductive traces. An adhesive layer couples the bridge die to the bottom of the open cavity. A gap is laterally between the bridge die and the sides of the open cavity, the gap surrounding the bridge die.

公开(公告)号：US20250070030A1

公开(公告)日：2025-02-27

申请号：US18943420

申请日：2024-11-11

Applicant: Intel Corporation

Inventor： Sanka GANESAN ,  Ram VISWANATH ,  Xavier Francois BRUN ,  Tarek A. IBRAHIM ,  Jason M. GAMBA ,  Manish DUBEY ,  Robert Alan MAY

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367

Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic component may include a substrate having a first face and an opposing second face, wherein the substrate includes a through-substrate via (TSV); a first mold material region at the first face, wherein the first mold material region includes a first through-mold via (TMV) conductively coupled to the TSV; and a second mold material region at the second face, wherein the second mold material region includes a second TMV conductively coupled to the TSV.