Oscillator Circuit
    11.
    发明申请
    Oscillator Circuit 有权
    振荡电路

    公开(公告)号:US20160099680A1

    公开(公告)日:2016-04-07

    申请号:US14861054

    申请日:2015-09-22

    Abstract: The disclosure provides an oscillator circuit for a voltage controlled oscillator. The oscillator circuit includes first and second coupled transmission lines, wherein the oscillator circuit is configured to provide a variable load impedance at a first end of a signal line of the first transmission line such that a variable inductance is provided between first and second ends of a signal line of the second transmission line in dependence on the variable load impedance. The oscillator circuit is configured to adjust the variable inductance provided between the first and second ends of the signal line of the second transmission line by adjusting the variable load impedance provided at the first end of the signal line of the first transmission line, wherein the variable inductance provided between the first and second ends of the signal line of the second transmission line constitutes a frequency determining element of the oscillator circuit.

    Abstract translation: 本公开提供了一种用于压控振荡器的振荡器电路。 振荡器电路包括第一和第二耦合传输线,其中振荡器电路被配置为在第一传输线的信号线的第一端处提供可变负载阻抗,使得可变电感被提供在第一和第二端之间 根据可变负载阻抗,第二传输线的信号线。 振荡器电路被配置为通过调节设置在第一传输线的信号线的第一端处的可变负载阻抗来调节设置在第二传输线的信号线的第一和第二端之间的可变电感,其中变量 设置在第二传输线的信号线的第一和第二端之间的电感构成振荡器电路的频率确定元件。

    Systems and methods for cascading radar chips having a low leakage buffer

    公开(公告)号:US10830868B2

    公开(公告)日:2020-11-10

    申请号:US15887030

    申请日:2018-02-02

    Abstract: A cascaded radar sensor arrangement is disclosed. The arrangement includes a first buffer and a second buffer. The first buffer is within a first radar chip and includes a switch and is configured to mitigate a first leakage signal in the disabled mode. The second buffer is within a second radar chip and has a disabled mode. The second radar chip is cascaded with the first radar chip. A control unit is coupled to the first radar chip and the second radar chip and is configured to set the disabled mode for the first buffer.

    Transmit Power Reduction for Radio Frequency Transmitters

    公开(公告)号:US20230184885A1

    公开(公告)日:2023-06-15

    申请号:US17547907

    申请日:2021-12-10

    CPC classification number: G01S7/35 G01S7/358 H03F3/245 G01S13/325 H03F2200/451

    Abstract: A method of operating a monolithic microwave integrated circuit (MMIC) in a radar transmitter includes: sending a radio frequency (RF) signal to a power amplifier of the radar transmitter, where the power amplifier is controlled by a termination control signal, where when the termination control signal is de-asserted, the power amplifier is configured to pass the RF signal through the power amplifier for transmission by an RF antenna, where when the termination control signal is asserted, the power amplifier is configured to terminate the RF signal in the power amplifier; transmitting the RF signal by de-asserting the termination control signal; and after de-asserting the termination control signal, disabling transmission of the RF signal by: reducing a power of the RF signal; and asserting the termination control signal.

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