公开(公告)号：US20140291808A1

公开(公告)日：2014-10-02

申请号：US14304701

申请日：2014-06-13

Applicant: Infineon Technologies AG

Inventor： Jens Schneider ,  Kai Esmark ,  Martin Wendel

IPC: H01L29/66 ,  H01L29/861 ,  H01L29/73

CPC classification number: H01L27/0255 ,  H01L21/26506 ,  H01L21/3221 ,  H01L23/62 ,  H01L27/0259 ,  H01L29/0603 ,  H01L29/32 ,  H01L29/66113 ,  H01L29/7302 ,  H01L29/861 ,  H01L29/866 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention relates to an avalanche diode that can be employed as an ESD protection device. An avalanche ignition region is formed at the p-n junction of the diode and includes an enhanced defect concentration level to provide rapid onset of avalanche current. The avalanche ignition region is preferably formed wider than the diode depletion zone, and is preferably created by placement, preferably by ion implantation, of an atomic specie different from that of the principal device structure. The doping concentration of the placed atomic specie should be sufficiently high to ensure substantially immediate onset of avalanche current when the diode breakdown voltage is exceeded. The new atomic specie preferably comprises argon or nitrogen, but other atomic species can be employed. However, other means of increasing a defect concentration level in the diode depletion zone, such as an altered annealing program, are also contemplated.

Abstract translation: 本发明涉及可用作ESD保护装置的雪崩二极管。 在二极管的p-n结处形成雪崩点火区域，并且包括增强的缺陷浓度水平以提供雪崩电流的快速起始。 雪崩点火区优选地形成为比二极管耗尽区更宽，并且优选地通过优选通过离子注入放置与主要器件结构不同的原子物种来产生。 放置的原子物种的掺杂浓度应足够高，以确保超过二极管击穿电压时，雪崩电流基本上立即开始。 新的原子物质优选地包括氩或氮，但是可以使用其它原子物质。 然而，也考虑了增加二极管耗尽区中的缺陷浓度水平的其它方法，例如改变的退火程序。

公开(公告)号：US20230369849A1

公开(公告)日：2023-11-16

申请号：US17743637

申请日：2022-05-13

Applicant: Infineon Technologies AG

Inventor： Christian Cornelius Russ ,  Kai Esmark

IPC: H02H9/04 ,  H01L25/065 ,  H01L27/02

CPC classification number: H02H9/046 ,  H01L25/0655 ,  H01L27/0255 ,  H01L27/0266 ,  H01L27/0288 ,  H01L27/0292 ,  H01L25/18

Abstract: The described techniques address issues associated with electrostatic discharge (ESD) protection for multi-die integrated circuits (ICs). The techniques include the use of two or more semiconductor dies within a multi-die IC, which may include a first semiconductor die without ESD protection but with full ESD exposure. The first semiconductor receives ESD protection via a second semiconductor die that is integrated as part of the same package with the first semiconductor die. The second semiconductor die may be electrically more remote from ESD-exposed pins compared to the first semiconductor die. The first semiconductor die may include integrated passive devices. The second semiconductor die enables ESD protection for both semiconductor dies in the same integrated IC package.

公开(公告)号：US10756081B2

公开(公告)日：2020-08-25

申请号：US15782582

申请日：2017-10-12

Applicant: Infineon Technologies Ag

Inventor： Jens Schneider ,  Kai Esmark ,  Martin Wendel

IPC: H01L27/02 ,  H01L29/32 ,  H01L29/861 ,  H01L29/866 ,  H01L29/66 ,  H01L29/73 ,  H01L21/265 ,  H01L21/322 ,  H01L29/06 ,  H01L23/62

Abstract: The invention relates to an avalanche diode that can be employed as an ESD protection device. An avalanche ignition region is formed at the p-n junction of the diode and includes an enhanced defect concentration level to provide rapid onset of avalanche current. The avalanche ignition region is preferably formed wider than the diode depletion zone, and is preferably created by placement, preferably by ion implantation, of an atomic specie different from that of the principal device structure. The doping concentration of the placed atomic specie should be sufficiently high to ensure substantially immediate onset of avalanche current when the diode breakdown voltage is exceeded. The new atomic specie preferably comprises argon or nitrogen, but other atomic species can be employed. However, other means of increasing a defect concentration level in the diode depletion zone, such as an altered annealing program, are also contemplated.

公开(公告)号：US20200243507A1

公开(公告)日：2020-07-30

申请号：US16775552

申请日：2020-01-29

Applicant: Infineon Technologies AG

Inventor： Christian Cornelius Russ ,  Markus Eckinger ,  Kai Esmark

IPC: H01L27/02 ,  H01L29/06 ,  H01L29/74

Abstract: An embodiment of a silicon controlled rectifier (SCR) includes a semiconductor body, an active device region, and a device isolation region configured to electrically insulate the active device region from neighboring active device regions. First SCR regions and a second SCR region of a first conductivity type are in the active device region. A first pn-junction or Schottky junction is formed at an interface between the first SCR regions and the second SCR region. A first plurality of the first SCR regions and sub-regions of the second SCR region are alternately arranged and directly adjoin one another. A second pn-junction is formed at an interface between the second SCR region and a third SCR region of a second conductivity type. A third pn-junction is formed at an interface between the third SCR region and a fourth SCR region of the first conductivity type.

公开(公告)号：US20130277712A1

公开(公告)日：2013-10-24

申请号：US13925445

申请日：2013-06-24

Applicant: Infineon Technologies AG

Inventor： Krzysztof Domanski ,  Cornelius C. Russ ,  Kai Esmark

IPC: H01L27/02 ,  H01L21/82

CPC classification number: H01L27/0262 ,  H01L21/82 ,  H01L27/0248 ,  H01L27/0255 ,  H01L27/0259 ,  H01L29/74 ,  H01L29/7436 ,  H01L2924/13034

Abstract: A semiconductor device includes an SCR ESD device region disposed within a semiconductor body, and a plurality of first device regions of the first conductivity type disposed on a second device region of the second conductivity type, where the second conductivity type is opposite the first conductivity type. Also included is a plurality of third device regions having a sub-region of the first conductivity type and a sub-region of the second conductivity type disposed on the second device region. The first regions and second regions are distributed such that the third regions are not directly adjacent to each other. A fourth device region of the first conductivity type adjacent to the second device region and a fifth device region of the second conductivity type disposed within the fourth device region are also included.