公开(公告)号：US10014256B2

公开(公告)日：2018-07-03

申请号：US15122396

申请日：2014-12-19

Applicant: Intel Corporation

Inventor： Donald W. Nelson ,  Yan A. Borodovsky ,  Mark C. Phillips

IPC: H01L23/48 ,  H01L23/528 ,  H01L21/027 ,  H01L21/311 ,  H01J37/04 ,  H01J37/317 ,  H01L21/768 ,  H01L27/02 ,  H01L27/11

CPC classification number: H01L23/5283 ,  H01J37/045 ,  H01J37/3177 ,  H01J2237/0435 ,  H01J2237/0453 ,  H01J2237/303 ,  H01J2237/30422 ,  H01J2237/30438 ,  H01J2237/31762 ,  H01J2237/31764 ,  H01L21/0277 ,  H01L21/31144 ,  H01L21/76816 ,  H01L21/76886 ,  H01L27/0207 ,  H01L27/11

Abstract: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a layout for a metallization layer of an integrated circuit includes a first region having a plurality of unidirectional lines of a first width and a first pitch and parallel with a first direction. The layout also includes a second region having a plurality of unidirectional lines of a second width and a second pitch and parallel with the first direction, the second width and the second pitch different than the first width and the first pitch, respectively. The layout also includes a third region having a plurality of unidirectional lines of a third width and a third pitch and parallel with the first direction, the third width and the third pitch different than the first and second widths and different than the first and second pitches.

公开(公告)号：US09897908B2

公开(公告)日：2018-02-20

申请号：US15122400

申请日：2014-12-19

Applicant: Intel Corporation

Inventor： Yan A. Borodovsky ,  Donald W. Nelson ,  Mark C. Phillips

IPC: G03F1/20 ,  G03F7/20 ,  H01J37/30 ,  H01J37/04 ,  H01J37/317 ,  H01J37/302 ,  H01L21/768

CPC classification number: G03F1/20 ,  G03F7/203 ,  H01J37/045 ,  H01J37/3026 ,  H01J37/3177 ,  H01J2237/0435 ,  H01J2237/0453 ,  H01J2237/303 ,  H01J2237/30422 ,  H01J2237/30438 ,  H01J2237/31762 ,  H01J2237/31764 ,  H01L21/76802

Abstract: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a blanker aperture array (BAA) for an e-beam tool is described. The BAA includes three distinct aperture arrays of different pitch.