公开(公告)号：US20090154240A1

公开(公告)日：2009-06-18

申请号：US12240529

申请日：2008-09-29

申请人： Jang-ho Park ,  Jae-kwan Park ,  Dong-hwa Kwak ,  So-wi Jin ,  Byung-jun Hwang ,  Nam-su Lim

发明人： Jang-ho Park ,  Jae-kwan Park ,  Dong-hwa Kwak ,  So-wi Jin ,  Byung-jun Hwang ,  Nam-su Lim

IPC分类号： G11C16/04 ,  H01L21/336 ,  G11C5/02

CPC分类号： H01L23/48 ,  G11C5/063 ,  G11C16/0483 ,  H01L21/02697 ,  H01L21/0337 ,  H01L21/32139 ,  H01L27/0207 ,  H01L27/115 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11568 ,  H01L2924/0002 ,  H01L2924/00

摘要： A NAND flash memory device includes a plurality of continuous conductors disposed on a common level of a multilayer substrate, the plurality of continuous conductors including respective conductive lines extending in parallel along a first direction, respective contact pads disposed at ends of the respective conductive lines and respective conductive dummy lines extending in parallel from the contact pads along a second direction

摘要翻译： NAND闪速存储器件包括布置在多层衬底的公共层上的多个连续导体，所述多个连续导体包括沿着第一方向平行延伸的相应的导线，设置在相应导电线的端部处的相应接触焊盘和 相应的导电虚拟线沿着第二方向从接触焊盘平行延伸

公开(公告)号：US08178442B2

公开(公告)日：2012-05-15

申请号：US12501515

申请日：2009-07-13

申请人： Sang-yong Park ,  Jae-kwan Park ,  Dong-hwa Kwak ,  Byung-kwan You

发明人： Sang-yong Park ,  Jae-kwan Park ,  Dong-hwa Kwak ,  Byung-kwan You

IPC分类号： H01L21/311

CPC分类号： H01L21/3086 ,  H01L21/76229 ,  H01L27/11526 ,  H01L27/11543 ,  H01L27/11548

摘要： A method in the fabrication of a semiconductor device simultaneously forms different patterns on the same level of the device. The device has a first area and a second area. A low density mask pattern of at least one relatively wide topographic feature is formed on the second area, a plurality of relatively narrow topographic features is formed on the first area, first spacers are formed on side walls of the narrow topographic features in the first area, the relatively narrow topographic features are removed, and the patterns of the first spacers and the relatively wide topographic feature(s) are simultaneously transcribed in the first and second areas, respectively.

摘要翻译： 制造半导体器件的方法同时在器件的同一层上形成不同的图案。 该装置具有第一区域和第二区域。 在第二区域上形成有至少一个相对较宽的地形特征的低密度掩模图案，在第一区域上形成多个相对窄的地形特征，第一间隔物形成在第一区域中的窄形地貌特征的侧壁上 去除相对窄的地形特征，并且分别在第一和第二区域中同时转录第一间隔物的图案和相对宽的地形特征。