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11.
公开(公告)号:US20140307194A1
公开(公告)日:2014-10-16
申请号:US14245102
申请日:2014-04-04
Applicant: Japan Display Inc.
Inventor: Isao SUZUMURA , Norihiro UEMURA , Takeshi NODA , Hidekazu MIYAKE , Yohei YAMAGUCHI
IPC: H01L29/786 , H01L27/12
CPC classification number: H01L29/78696 , G02F1/133345 , G02F1/133512 , G02F1/133514 , G02F1/1337 , G02F1/134309 , G02F1/1368 , G02F2001/133357 , H01L27/1225 , H01L27/1285 , H01L29/24 , H01L29/78606 , H01L29/78618 , H01L29/78633 , H01L29/7869 , H01L29/78693
Abstract: In a bottom gate thin film transistor using a first oxide semiconductor layer as a channel layer, the first oxide semiconductor layer and second semiconductor layers include In and O. An (O/In) ratio of the second oxide semiconductor layers is equal to or larger than that of the first oxide semiconductor layer, and a film thickness thereof is thicker than that of the first oxide semiconductor layer.
Abstract translation: 在使用第一氧化物半导体层作为沟道层的底栅极薄膜晶体管中,第一氧化物半导体层和第二半导体层包括In和O.第二氧化物半导体层的(O / In)比等于或大于 比第一氧化物半导体层的厚度厚,其厚度比第一氧化物半导体层厚。