公开(公告)号：US20240088161A1

公开(公告)日：2024-03-14

申请号：US18508490

申请日：2023-11-14

Applicant: Japan Display Inc.

Inventor： Yohei YAMAGUCHI

IPC: H01L27/12 ,  G02F1/1333 ,  G02F1/1368 ,  H01L29/417 ,  H01L29/786

CPC classification number: H01L27/1225 ,  G02F1/133345 ,  G02F1/1368 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1251 ,  H01L29/41733 ,  H01L29/78618 ,  H01L29/7869 ,  G02F1/134363 ,  H01L29/78675

Abstract: The purpose of the present invention is to improve reliability of the TFT of the oxide semiconductor. The feature of the invention is: A display device comprising: a substrate including a display area where plural pixels are formed, the pixel includes a first TFT of a first oxide semiconductor, a first gate insulating film is formed under the first oxide semiconductor, a first gate electrode is formed under the first gate insulating film, an interlayer insulating film is formed on the first oxide semiconductor; a drain wiring, which connects with the first oxide semiconductor, and a source wiring, which connects with the first oxide semiconductor, are formed on the interlayer insulating film; the drain wiring or the source wiring is a laminated structure of a second oxide semiconductor and a first metal, the second oxide semiconductor is under the first metal.

公开(公告)号：US20230020074A1

公开(公告)日：2023-01-19

申请号：US17945214

申请日：2022-09-15

Applicant: Japan Display Inc.

Inventor： Yohei YAMAGUCHI ,  Arichika ISHIDA ,  Hidekazu MIYAKE ,  Hiroto MIYAKE ,  Isao SUZUMURA

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/786 ,  G02F1/1343

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first metal layer on the insulating substrate, a first insulating layer on the insulating substrate and the first metal layer, a semiconductor layer on the first insulating layer, a second insulating layer on the semiconductor layer and the first insulating layer, a second metal layer on the second insulating layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer. The first metal layer overlaps the second metal layer. A third metal layer contacts a top surface of the second metal layer and a top surface of the first metal layer.

公开(公告)号：US20200251505A1

公开(公告)日：2020-08-06

申请号：US16852925

申请日：2020-04-20

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Isao SUZUMURA ,  Akihiro HANADA ,  Yohei YAMAGUCHI

IPC: H01L27/12 ,  H01L29/24 ,  H01L29/786 ,  H01L29/66

Abstract: A display device including a substrate having thin film transistors (TFT) comprising: the TFT including an oxide semiconductor film, a gate electrode and an insulating film formed between the oxide semiconductor film and the gate electrode, wherein a first aluminum oxide film and a second aluminum oxide film, which is formed on the first aluminum oxide film, are formed between the insulating film and the gate electrode, an oxygen concentration in the first aluminum oxide film is bigger than an oxygen concentration in the second aluminum oxide film.

公开(公告)号：US20190305009A1

公开(公告)日：2019-10-03

申请号：US16446481

申请日：2019-06-19

Applicant: Japan Display Inc.

Inventor： Yohei YAMAGUCHI

IPC: H01L27/12 ,  H01L29/786 ,  G02F1/1333 ,  G02F1/1368

Abstract: The purpose of the present invention is to improve reliability of the TFT of the oxide semiconductor. The feature of the invention is: A display device comprising: a substrate including a display area where plural pixels are formed, the pixel includes a first TFT of a first oxide semiconductor, a first gate insulating film is formed under the first oxide semiconductor, a first gate electrode is formed under the first gate insulating film, an interlayer insulating film is formed on the first oxide semiconductor; a drain wiring, which connects with the first oxide semiconductor, and a source wiring, which connects with the first oxide semiconductor, are formed on the interlayer insulating film; the drain wiring or the source wiring is a laminated structure of a second oxide semiconductor and a first metal, the second oxide semiconductor is under the first metal.

公开(公告)号：US20190244979A1

公开(公告)日：2019-08-08

申请号：US15929125

申请日：2019-04-18

Applicant: Japan Display Inc.

Inventor： Isao SUZUMURA ,  Yohei YAMAGUCHI ,  Hajime WATAKABE ,  Akihiro HANADA ,  Hirokazu WATANABE ,  Marina SHIOKAWA

IPC: H01L27/12 ,  H01L29/49 ,  H01L21/02 ,  H01L29/786 ,  H01L29/66 ,  H01L21/4763 ,  H01L21/465

CPC classification number: H01L27/1225 ,  G02F1/133305 ,  G02F1/13452 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136295 ,  G02F2202/10 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02565 ,  H01L21/465 ,  H01L21/47635 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1266 ,  H01L27/127 ,  H01L27/3248 ,  H01L27/3262 ,  H01L27/3276 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/4983 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869

Abstract: A display device to improve reliability of the TFT of the oxide semiconductor, including: a substrate including a display area where plural pixels are formed, the pixel includes a first TFT of a first oxide semiconductor; a first gate insulating film is formed on the first oxide semiconductor, a gate electrode is formed on the first gate insulating film, an interlayer insulating film is formed over the gate electrode; the gate insulating film includes a first silicon oxide film, the gate electrode includes a first gate layer made of a second oxide semiconductor and a second gate layer made of metal or alloy; the interlayer insulating film has a first interlayer insulating film including a second silicon oxide film, and a second interlayer insulating film including a first aluminum oxide film on the first interlayer insulating film.

公开(公告)号：US20160163741A1

公开(公告)日：2016-06-09

申请号：US15015445

申请日：2016-02-04

Applicant: Japan Display Inc.

Inventor： Isao SUZUMURA ,  Norihiro UEMURA ,  Hidekazu MIYAKE ,  Yohei YAMAGUCHI

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L21/02071 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/32138 ,  H01L21/32139 ,  H01L21/473 ,  H01L27/1248 ,  H01L27/127 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78693

Abstract: There is provided a bottom gate channel etched thin film transistor that can suppress initial Vth depletion and a Vth shift. A thin film transistor is formed, including a gate electrode interconnection disposed on a substrate, a gate insulating film, an oxide semiconductor layer to be a channel layer, a stacked film of a source electrode interconnection and a first hard mask layer, a stacked film of a drain electrode interconnection and a second hard mask layer, and a protective insulating film.

公开(公告)号：US20150179812A1

公开(公告)日：2015-06-25

申请号：US14573124

申请日：2014-12-17

Applicant: Japan Display Inc.

Inventor： Isao SUZUMURA ,  Norihiro UEMURA ,  Hidekazu MIYAKE ,  Yohei YAMAGUCHI

IPC: H01L29/786 ,  H01L21/473 ,  H01L21/4763 ,  H01L21/033 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L27/1225 ,  H01L21/02071 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/32138 ,  H01L21/32139 ,  H01L21/473 ,  H01L27/1248 ,  H01L27/127 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78693

Abstract: There is provided a bottom gate channel etched thin film transistor that can suppress initial Vth depletion and a Vth shift. A thin film transistor is formed, including a gate electrode interconnection disposed on a substrate, a gate insulating film, an oxide semiconductor layer to be a channel layer, a stacked film of a source electrode interconnection and a first hard mask layer, a stacked film of a drain electrode interconnection and a second hard mask layer, and a protective insulating film.

Abstract translation: 提供了可以抑制初始Vth耗尽和Vth偏移的底栅通道蚀刻薄膜晶体管。 形成薄膜晶体管，其包括设置在基板上的栅电极互连，栅极绝缘膜，作为沟道层的氧化物半导体层，源极互连的叠层膜和第一硬掩模层，层叠膜 的漏电极互连和第二硬掩模层，以及保护绝缘膜。

公开(公告)号：US20140362059A1

公开(公告)日：2014-12-11

申请号：US14300257

申请日：2014-06-10

Applicant: Japan Display Inc.

Inventor： Norihiro UEMURA ,  Hidekazu MIYAKE ,  Takeshi NODA ,  Isao SUZUMURA ,  Yohei YAMAGUCHI

IPC: H01L27/12 ,  G09G5/00 ,  H01L29/786

CPC classification number: G09G5/00 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/7869

Abstract: A thin film transistor includes a drain electrode layer and a source electrode layer that are formed above an oxide semiconductor layer via an insulating film. The drain electrode layer and the source electrode layer are electrically connected with the oxide semiconductor layer via through-holes formed in the insulating film. A first through-hole that electrically connects the drain electrode layer with the oxide semiconductor layer and a second through-hole that electrically connects the source electrode layer with the oxide semiconductor layer each include two or more through-holes that are arranged in parallel in a channel width direction of the thin film transistor. A total width of opening widths of the first or second through-holes in the channel width direction is a channel width of the thin film transistor.

Abstract translation: 薄膜晶体管包括通过绝缘膜形成在氧化物半导体层上方的漏电极层和源极电极层。 漏电极层和源电极层通过形成在绝缘膜中的通孔与氧化物半导体层电连接。 将漏电极层与氧化物半导体层电连接的第一通孔和将源电极层与氧化物半导体层电连接的第二通孔各自包括两个或更多个平行布置的通孔， 薄膜晶体管的沟道宽度方向。 沟道宽度方向上的第一或第二通孔的开口宽度的总宽度是薄膜晶体管的沟道宽度。

公开(公告)号：US20230387146A1

公开(公告)日：2023-11-30

申请号：US18366859

申请日：2023-08-08

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Isao SUZUMURA ,  Akihiro HANADA ,  Yohei YAMAGUCHI

IPC: H01L27/12 ,  H01L29/24 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L27/1292 ,  H01L29/24 ,  H01L29/78666 ,  H01L29/7869 ,  H01L29/66969 ,  H01L27/1225 ,  H01L29/66757

Abstract: A display device including a substrate having thin film transistors (TFT) comprising: the TFT including an oxide semiconductor film, a gate electrode and an insulating film formed between the oxide semiconductor film and the gate electrode, wherein a first aluminum oxide film and a second aluminum oxide film, which is formed on the first aluminum oxide film, are formed between the insulating film and the gate electrode, an oxygen concentration in the first aluminum oxide film is bigger than an oxygen concentration in the second aluminum oxide film.

公开(公告)号：US20230361220A1

公开(公告)日：2023-11-09

申请号：US18346927

申请日：2023-07-05

Applicant: Japan Display Inc.

Inventor： Yohei YAMAGUCHI ,  Kazufumi WATABE ,  Tomoyuki ARIYOSHI ,  Osamu KARIKOME ,  Ryohei TAKAYA

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/423 ,  H01L29/49 ,  H01L29/40 ,  H01L29/45

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1214 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/401 ,  H01L27/124 ,  H01L29/45

Abstract: The invention allows stable fabrication of a TFT circuit board used in a display device and having thereon an oxide semiconductor TFT. A TFT circuit board includes a TFT that includes an oxide semiconductor. The TFT has a gate insulating film formed on part of the oxide semiconductor and a gate electrode formed on the gate insulating film. A portion of the oxide semiconductor that is covered with the gate electrode 104 and a portion of the oxide semiconductor that is not covered with the gate electrode are both covered with a first interlayer insulating film. The first interlayer insulating film is covered with a first film 106, and the first film is covered with a first AlO film.