公开(公告)号：US08237236B2

公开(公告)日：2012-08-07

申请号：US12762839

申请日：2010-04-19

申请人： Jin Dong Song ,  Sung Jung Joo ,  Jin Ki Hong ,  Sang Hoon Shin ,  Kyung Ho Shin ,  Tae Yueb Kim ,  Ju Young Lim ,  Jin Seo Lee ,  Kung Won Rhie

发明人： Jin Dong Song ,  Sung Jung Joo ,  Jin Ki Hong ,  Sang Hoon Shin ,  Kyung Ho Shin ,  Tae Yueb Kim ,  Ju Young Lim ,  Jin Seo Lee ,  Kung Won Rhie

IPC分类号： H01L29/82

CPC分类号： H01L29/82

摘要： An InSb-based switching device, which operates at room temperature by using a magnetic field controlled avalanche process for applying to magneto-logic elements, is provided. A switching device of one embodiment includes a p-type semiconductor layer; an n-type semiconductor layer; and contact layers disposed on one of the p-type and n-type semiconductor layers, the p-type semiconductor layer being in contact with the n-type semiconductor layer such that a current can be applied through the contact layers to the p-type and n-type semiconductor layers to cause a current flow from one of the contact layers to the p-type and n-type semiconductor layers and from the p-type and n-type semiconductor layers to the other of the contact layers, whereby the current flow can be controlled by an intensity of a magnetic field applied to the p-type and n-type semiconductor layers substantially perpendicularly thereto.

摘要翻译： 提供了一种基于InSb的开关装置，其通过使用用于应用于磁逻辑元件的磁场控制雪崩处理在室温下操作。 一个实施例的开关器件包括p型半导体层; n型半导体层; 以及设置在p型和n型半导体层中的一个上的接触层，p型半导体层与n型半导体层接触，使得可以通过接触层将电流施加到p型 和n型半导体层，以使电流从一个接触层流向p型和n型半导体层，并从p型和n型半导体层到另一个接触层，由此， 可以通过施加到基本垂直于其的p型和n型半导体层的磁场的强度来控制电流。

公开(公告)号：US20110186961A1

公开(公告)日：2011-08-04

申请号：US12836482

申请日：2010-07-14

申请人： Young Hee YOON ,  Jun Gi Choi ,  Sang Hoon Shin

发明人： Young Hee YOON ,  Jun Gi Choi ,  Sang Hoon Shin

IPC分类号： H01L23/525

CPC分类号： H01L23/525 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided is a semiconductor integrated circuit. The semiconductor integrated circuit comprises: a pair of interconnections; a fuse connecting the pair of interconnections; and one or more heat dissipation patterns connecting the pair of interconnections and are disposed around the fuse.

摘要翻译： 提供了一种半导体集成电路。 半导体集成电路包括：一对互连; 连接该对互连的保险丝; 以及连接所述一对互连件的一个或多个散热图案，并且设置在保险丝周围。

公开(公告)号：US20110024743A1

公开(公告)日：2011-02-03

申请号：US12648680

申请日：2009-12-29

申请人： Jeong Woo LEE ,  Hyung Dong Lee ,  Jun Gi Choi ,  Sang Hoon Shin ,  Xiang Hua Cui

发明人： Jeong Woo LEE ,  Hyung Dong Lee ,  Jun Gi Choi ,  Sang Hoon Shin ,  Xiang Hua Cui

IPC分类号： H01L23/52

CPC分类号： H01L25/0657 ,  G01R31/2884 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor integrated circuit includes a multi-chip package having a plurality of semiconductor chips. The semiconductor integrated circuit includes a signal line; and a signal loading compensation section in a semiconductor chip among the plurality of semiconductor chips, configured to apply a designed signal loading to the signal line in response to activation of a test signal. Here, the designed signal loading has a value corresponding to a signal loading component of another semiconductor chip among the plurality of semiconductor chips to the signal line.

摘要翻译： 半导体集成电路包括具有多个半导体芯片的多芯片封装。 半导体集成电路包括信号线; 以及多个半导体芯片中的半导体芯片中的信号负载补偿部，被配置为响应于测试信号的激活而将设计的信号加载到信号线。 这里，设计的信号负载具有与信号线的多个半导体芯片中的另一半导体芯片的信号负载分量相对应的值。

公开(公告)号：US20100308378A1

公开(公告)日：2010-12-09

申请号：US12762839

申请日：2010-04-19

申请人： Jin Dong Song ,  Sung Jung Joo ,  Jin Ki Hong ,  Sang Hoon Shin ,  Kyung Ho Shin ,  Tae Yueb Kim ,  Ju Young Lim ,  Jin Seo Lee ,  Kung Won Rhie

发明人： Jin Dong Song ,  Sung Jung Joo ,  Jin Ki Hong ,  Sang Hoon Shin ,  Kyung Ho Shin ,  Tae Yueb Kim ,  Ju Young Lim ,  Jin Seo Lee ,  Kung Won Rhie

IPC分类号： H01L29/82

CPC分类号： H01L29/82

摘要： The present invention provides an InSb-based switching device operating at room temperature by using a magnetic field controlled avalanche process for applying to magneto-logic elements. A switching device of one embodiment includes a p-type semiconductor layer; an n-type semiconductor layer; and contact layers disposed on one of the p-type and n-type semiconductor layers, the p-type semiconductor layer being in contact with the n-type semiconductor layer such that a current can be applied through the contact layers to the p-type and n-type semiconductor layers to cause a current flow from one of the contact layers to the p-type and n-type semiconductor layers and from the p-type and n-type semiconductor layers to the other of the contact layers, whereby the current flow can be controlled by an intensity of a magnetic field applied to the p-type and n-type semiconductor layers substantially perpendicularly thereto.

摘要翻译： 本发明提供一种基于InSb的开关装置，其通过使用用于施加到磁逻辑元件的磁场控制雪崩处理在室温下工作。 一个实施例的开关器件包括p型半导体层; n型半导体层; 以及设置在p型和n型半导体层中的一个上的接触层，p型半导体层与n型半导体层接触，使得可以通过接触层将电流施加到p型 和n型半导体层，以使电流从一个接触层流向p型和n型半导体层，并从p型和n型半导体层到另一个接触层，由此， 可以通过施加到基本垂直于其的p型和n型半导体层的磁场的强度来控制电流。

公开(公告)号：US20090122632A1

公开(公告)日：2009-05-14

申请号：US12169595

申请日：2008-07-08

申请人： Seung Wook Kwak ,  Sang Hoon Shin ,  Keun Soo Song

发明人： Seung Wook Kwak ,  Sang Hoon Shin ,  Keun Soo Song

IPC分类号： G11C17/16 ,  G11C8/00

CPC分类号： G11C5/025 ,  G11C5/02 ,  G11C5/063 ,  G11C7/10 ,  G11C8/10

摘要： A semiconductor memory apparatus is capable of improving the alignment margin for a bank and sufficiently ensuring a space for forming a global input/output line. The semiconductor memory apparatus includes a stack bank structure having at least two sub-banks continuously stacked without disconnection of data signal lines, and a control block arranged at one side of the stack bank structure to simultaneously control column-related signals of the sub-banks.

摘要翻译： 半导体存储装置能够提高存储体的对准余量，并充分确保用于形成全局输入/输出线的空间。 该半导体存储装置包括堆叠组结构，其具有至少两个子组，连续堆叠而不断开数据信号线;以及控制块，布置在堆栈组结构的一侧，以同时控制子组的列相关信号 。

公开(公告)号：US06512730B1

公开(公告)日：2003-01-28

申请号：US09617202

申请日：2000-07-14

申请人： In Ho Lee ,  Sang Hoon Shin ,  Hyuk Soo Park ,  In Gi Cheon ,  Han Baek Lee

发明人： In Ho Lee ,  Sang Hoon Shin ,  Hyuk Soo Park ,  In Gi Cheon ,  Han Baek Lee

IPC分类号： G11B1704

CPC分类号： G11B17/0515

摘要： A disk receiving and transferring device by which a disk is precisely guided into the disk drive. Disks of different diameter can be inserted into a single disk drive, and at the same time gears are smoothly engaged during power transmission for the clamping of a disk. The disk receiving and transferring device of the invention includes: a disk transferor for transferring a disk by the power of a driving source; a balance guide unit for guiding the disk inserted into the device by the transferor for thereby precisely inserting the disk; a holder guide unit which interlocks with the balance guide unit and is guided by the balance guide unit for thereby receiving the disk moved by the transferor and guiding the disk until the disk transfer is finished; and a sensor guide unit for interlocking with the holder guide unit, guiding the disk by the insertion power of the disk, and connecting the power for clamping the disk, wherein the balance guide unit and holder guide unit are configured to be fastened when the power of the driving source is connected.

摘要翻译： 磁盘接收和传送设备，通过该设备将磁盘精确地引导到磁盘驱动器中。 不同直径的磁盘可以插入单个磁盘驱动器，同时齿轮在动力传动期间被平滑地接合以夹紧磁盘。 本发明的磁盘接收和传送装置包括：磁盘传送器，用于通过驱动源的电力传送磁盘; 平衡引导单元，用于引导由转印器插入到装置中的盘，从而精确地插入盘; 保持器引导单元，其与平衡引导单元互锁并由平衡引导单元引导，从而接收由转印器移动的盘并引导盘直到盘转印结束; 以及传感器引导单元，用于与保持器引导单元互锁，通过盘的插入力引导盘，并连接用于夹紧盘的动力，其中平衡引导单元和保持器引导单元被构造成当动力 的驱动源是连接的。

公开(公告)号：USD918836S1

公开(公告)日：2021-05-11

申请号：US29695221

申请日：2019-06-17

申请人： Sang Hoon Shin

设计人： Sang Hoon Shin

公开(公告)号：US08748888B2

公开(公告)日：2014-06-10

申请号：US12648680

申请日：2009-12-29

申请人： Jeong Woo Lee ,  Hyung Dong Lee ,  Jun Gi Choi ,  Sang Hoon Shin ,  Xiang Hua Cui

发明人： Jeong Woo Lee ,  Hyung Dong Lee ,  Jun Gi Choi ,  Sang Hoon Shin ,  Xiang Hua Cui

IPC分类号： H01L23/58

CPC分类号： H01L25/0657 ,  G01R31/2884 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor integrated circuit includes a multi-chip package having a plurality of semiconductor chips. The semiconductor integrated circuit includes a signal line; and a signal loading compensation section in a semiconductor chip among the plurality of semiconductor chips, configured to apply a designed signal loading to the signal line in response to activation of a test signal. Here, the designed signal loading has a value corresponding to a signal loading component of another semiconductor chip among the plurality of semiconductor chips to the signal line.

摘要翻译： 半导体集成电路包括具有多个半导体芯片的多芯片封装。 半导体集成电路包括信号线; 以及多个半导体芯片中的半导体芯片中的信号负载补偿部，被配置为响应于测试信号的激活而将设计的信号加载到信号线。 这里，设计的信号负载具有与信号线的多个半导体芯片中的另一半导体芯片的信号负载分量相对应的值。

公开(公告)号：US08687443B2

公开(公告)日：2014-04-01

申请号：US13171747

申请日：2011-06-29

申请人： Sang Hoon Shin ,  Kang Seol Lee

发明人： Sang Hoon Shin ,  Kang Seol Lee

IPC分类号： G11C7/00 ,  G11C29/00

CPC分类号： G11C29/26 ,  G11C7/10 ,  G11C7/1006 ,  G11C29/021 ,  G11C29/028 ,  G11C29/4401 ,  G11C2029/0411 ,  G11C2029/4402

摘要： Various embodiments of a semiconductor apparatus are disclosed. In one exemplary embodiment, a semiconductor apparatus may include a memory block chip and a signal input/output chip. The memory block chip is configured to control a data access size according to specifications. The signal input/output chip is configured to transmit input data from an external device to the memory block chip or transmit output data from the memory block chip to an external device and process the input data or the output data by selectively enabling a clock phase control unit and a signal processing unit according to the specifications.

摘要翻译： 公开了半导体装置的各种实施例。 在一个示例性实施例中，半导体装置可以包括存储器块芯片和信号输入/输出芯片。 存储器块芯片被配置为根据规格控制数据访问大小。 信号输入/输出芯片被配置为将输入数据从外部设备发送到存储器块芯片，或者将输出数据从存储器块芯片发送到外部设备，并通过有选择地启用时钟相位控制来处理输入数据或输出数据 单元和信号处理单元。

公开(公告)号：US08514641B2

公开(公告)日：2013-08-20

申请号：US12840231

申请日：2010-07-20

申请人： Xiang Hua Cui ,  Jeong Woo Lee ,  Sang Hoon Shin

发明人： Xiang Hua Cui ,  Jeong Woo Lee ,  Sang Hoon Shin

IPC分类号： G11C7/00

CPC分类号： G11C29/702

摘要： A repair circuit of a semiconductor apparatus includes a plurality of through-silicon vias including repeated sets of one repair through-silicon via and an M number of normal through-silicon vias; a transmission unit configured to multiplex input data at a first multiplexing rate based on control signals, and transmit the multiplexed data to the plurality of through-silicon vias; a reception unit configured to multiplex signals transmitted through the plurality of through-silicon vias at a second multiplexing rate based on the control signals, and generate output data; and a control signal generation unit configured to generate sets of the control signals based on an input number of a test signal.

摘要翻译： 半导体装置的修复电路包括多个穿硅通孔，包括重复的一组修复通硅通孔和M个通常的硅通孔; 传输单元，被配置为基于控制信号以第一多路复用速率复用输入数据，并将多路复用数据发送到多个通孔通孔; 接收单元，被配置为基于所述控制信号以第二多路复用速率复用通过所述多个穿硅通孔传输的信号，并生成输出数据; 以及控制信号生成单元，被配置为基于测试信号的输入号码生成控制信号的集合。