公开(公告)号：US20220262954A1

公开(公告)日：2022-08-18

申请号：US17734960

申请日：2022-05-02

Applicant: Kioxia Corporation

Inventor： Tomoki ISHIMARU ,  Shinji MORI ,  Kazuhiro MATSUO ,  Keiichi SAWA ,  Akifumi GAWASE

IPC: H01L29/786 ,  H01L27/108 ,  H01L29/267 ,  H01L29/08 ,  H01L29/417 ,  H01L29/40

Abstract: A semiconductor device of an embodiment includes a first electrode, a second electrode, a first metallic region provided between the first electrode and the second electrode and includes at least one metallic element selected from the group consisting of indium (In), gallium (Ga), zinc (Zn), aluminum (Al), magnesium (Mg), manganese (Mn), titanium (Ti), tungsten (W), molybdenum (Mo), and tin (Sn), a second metallic region provided between the first metallic region and the second electrode and includes the at least one metallic element, a semiconductor region provided between the first metallic region and the second metallic region and includes the at least one metallic element and oxygen (O), an insulating region provided between the first metallic region and the second metallic region and is surrounded by the semiconductor region, a gate electrode surrounding the semiconductor region, and a gate insulating layer provided between the semiconductor region and the gate electrode.

公开(公告)号：US20230354596A1

公开(公告)日：2023-11-02

申请号：US18344957

申请日：2023-06-30

Applicant: Kioxia Corporation

Inventor： Keiichi SAWA

IPC: H10B41/35 ,  H01L29/66 ,  H10B41/27 ,  H01L29/788 ,  H10B41/10

CPC classification number: H10B41/27 ,  H01L29/66825 ,  H01L29/788 ,  H01L29/7889 ,  H10B41/10 ,  H10B41/35

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a plurality of U-shaped memory strings, each of the plurality of U-shaped memory strings including a first columnar body, a second columnar body, and a conductive connection body. The conductive connection body connects the first columnar body and the second columnar body. A plurality of first memory cells are connected in series in the first columnar body and are composed of a plurality of first conductive layers, a first inter-gate insulating film, a plurality of first floating electrodes, a first tunnel insulating film, and a first memory channel layer. The plurality of first floating electrodes are separated from the plurality of first conductive layers by the first inter-gate insulating film. A plurality of second memory cells are connected in series in the second columnar body, similally to the plurality of first memoriy cells.

公开(公告)号：US20230309310A1

公开(公告)日：2023-09-28

申请号：US17930889

申请日：2022-09-09

Applicant: Kioxia Corporation

Inventor： Yuta SAITO ,  Shinji MORI ,  Hiroyuki YAMASHITA ,  Satoshi NAGASHIMA ,  Kazuhiro MATSUO ,  Kota TAKAHASHI ,  Shota KASHIYAMA ,  Keiichi SAWA ,  Junichi KANEYAMA

IPC: H01L27/1158 ,  G11C5/06 ,  H01L27/1157

CPC classification number: H01L27/1157 ,  G11C5/063 ,  H01L27/1158

Abstract: A semiconductor device of embodiments includes: a semiconductor layer containing silicon (Si); a first insulating layer provided in a first direction of the semiconductor layer; a second insulating layer surrounded by the semiconductor layer in a first cross section perpendicular to the first direction and containing silicon (Si) and oxygen (O); a third insulating layer surrounded by the second insulating layer in the first cross section and containing a metal element and oxygen (O); and a conductive layer surrounded by the first insulating layer in a second cross section perpendicular to the first direction, provided in the first direction of the third insulating layer, and spaced from the semiconductor layer.

公开(公告)号：US20210013225A1

公开(公告)日：2021-01-14

申请号：US16809887

申请日：2020-03-05

Applicant: Kioxia Corporation

Inventor： Yuta SAITO ,  Shinji MORI ,  Atsushi TAKAHASHI ,  Toshiaki YANASE ,  Keiichi SAWA ,  Kazuhiro MATSUO ,  Hiroyuki YAMASHITA

IPC: H01L27/11582 ,  H01L29/04 ,  H01L21/02

Abstract: In one embodiment, a semiconductor storage device includes a stacked body in which a plurality of conducting layers are stacked through a plurality of insulating layers in a first direction, a semiconductor layer penetrating the stacked body, extending in the first direction and including metal atoms, and a memory film including a first insulator, a charge storage layer and a second insulator that are provided between the stacked body and the semiconductor layer. The semiconductor layer surrounds a third insulator penetrating the stacked body and extending in the first direction, and at least one crystal grain in the semiconductor layer has a shape surrounding the third insulator.