公开(公告)号：US07012949B2

公开(公告)日：2006-03-14

申请号：US09959501

申请日：2001-03-12

申请人： Mitsuru Uesugi

发明人： Mitsuru Uesugi

IPC分类号： H04B1/69

CPC分类号： H04L5/023 ,  H04B1/707 ,  H04L5/06

摘要： A transmitting apparatus and method may inverse Fourier transform transmit data converted to parallel form to obtain a first signal. The band of a second signal is limited to a guard frequency band adjacent to the band of the first signal, and a signal comprising the first and second signals is transmitted.

摘要翻译： 发送装置和方法可以逆傅立叶变换转换成并行形式的发送数据以获得第一信号。 第二信号的频带被限制为与第一信号的频带相邻的保护频带，并且发送包括第一和第二信号的信号。

公开(公告)号：US06810096B1

公开(公告)日：2004-10-26

申请号：US09743986

申请日：2001-01-18

申请人： Yoshiko Saito ,  Mitsuru Uesugi

发明人： Yoshiko Saito ,  Mitsuru Uesugi

IPC分类号： H03D100

CPC分类号： H04B7/0857 ,  H01Q3/26

摘要： Signal component converging section 105 delays received signal components spread on a time axis to combine signal components based on an output of propagation path estimating section 104, maximum value detecting section 106 detects a sample timing of a signal component with the maximum power among signal components combined in signal component converging section 105, and tap coefficient estimating section 107 estimates a tap coefficient that minimizes a mean square of a difference between a replica signal and a received signal while assigning a tap coefficient of a fixed value (for example, 1) to a sampling timing providing the maximum power, and outputs the estimated tap coefficient to FFF in plural array combining section 102 and a replica generating section in Viterbi equalizer 108.

摘要翻译： 信号分量会聚部105基于传播路径估计部104的输出，延迟在时间轴上扩展的接收信号分量，合成信号成分，最大值检测部106检测信号成分的信号成分的采样定时 在信号分量收敛部分105中，抽头系数估计部分107估计将复数信号和接收信号之间的差的均方最小的抽头系数，同时将固定值（例如，1）的抽头系数分配给 提供最大功率的采样定时，并将估计抽头系数输出到多个阵列组合部分102和维特比均衡器108中的副本生成部分的FFF。

公开(公告)号：US06683863B2

公开(公告)日：2004-01-27

申请号：US09968022

申请日：2001-10-02

申请人： Kazuyuki Miya ,  Mitsuru Uesugi

发明人： Kazuyuki Miya ,  Mitsuru Uesugi

IPC分类号： H04B7216

CPC分类号： H04B7/264

摘要： A CDMA radio transmission apparatus includes a multiplexer that time-multiplexes variable data and fixed data. The variable data includes a quantity of data that is variable with respect to time and the fixed data includes a quantity of data that is fixed with respect to time. A randomizer randomizes a transmission timing of the fixed data by controlling a placement of the fixed data. A data quantity converter that converts the quantity of variable data.

摘要翻译： CDMA无线电传输装置包括对可变数据和固定数据进行时分复用的多路复用器。 可变数据包括相对于时间可变的数据量，固定数据包括相对于时间固定的数据量。 随机化器通过控制固定数据的放置来随机化固定数据的传输定时。 一种转换可变数据量的数据量转换器。

公开(公告)号：US06456677B1

公开(公告)日：2002-09-24

申请号：US09709650

申请日：2000-11-13

申请人： Katsuhiko Hiramatsu ,  Mitsuru Uesugi ,  Hiroaki Sudo

发明人： Katsuhiko Hiramatsu ,  Mitsuru Uesugi ,  Hiroaki Sudo

IPC分类号： H04L700

CPC分类号： H04L7/0054 ,  H04L7/0334 ,  H04L7/0337 ,  H04L7/041

摘要： The synchronizing apparatus includes a block for detecting a code from an input signal, a block for detecting from the code the variable points of the code at several times as high as the symbol rate, a block for calculating a histogram of the detected variables of the code to time, and a block for deciding that the phase number at which the calculated histogram takes the maximum value is a symbol synchronization point. This synchronizing apparatus detects the zero-cross points of an intermediate frequency band signal at N times as high as the symbol rate. It also calculates a histogram of detected time (0 to N−1). The time (0 to N−1) at which the histogram is the maximum within a predetermined detected time is selected as a symbol clock, and thereby symbol synchronization is established.

摘要翻译： 同步装置包括用于从输入信号中检测代码的块，用于从代码中检测代码的可变点数为符号速率的几倍的块，用于计算检测到的变量的直方图的块 代码到时间，以及用于确定计算的直方图获取最大值的相位数的块是符号同步点。 该同步装置检测中间频带信号的零交叉点的N倍于符号率。 它还计算检测时间的直方图（0到N-1）。 选择在预定检测时间内直方图为最大值的时间（0到N-1）作为符号时钟，从而建立符号同步。

公开(公告)号：US06404827B1

公开(公告)日：2002-06-11

申请号：US09313990

申请日：1999-05-19

申请人： Mitsuru Uesugi

发明人： Mitsuru Uesugi

IPC分类号： H03D100

CPC分类号： H04L25/024 ,  H04L27/2273 ,  H04L2027/0028 ,  H04L2027/0046 ,  H04L2027/0053

摘要： In the receiver of the present invention, it is after weighting every observed value with corresponding likelihood at every observation points that a least square method is utilized as a linear prediction to the observations, in order to improve the accuracy of the linear prediction by making the influence of the probable observed values to the prediction result larger. The present invention can improve the accuracy of received signal correction in a receiver, by making a linear prediction more reliable, which is applied for frequency offset compensation, phase shift compensation, synchronization shift adjustment, combined diversity and other signal values estimation.

摘要翻译： 在本发明的接收机中，在每个观测点对每个观测值加权每个观测值之后，使用最小二乘法作为观测值的线性预测，以便通过使得线性预测的精度提高 可能的观察值对预测结果的影响较大。 本发明可以通过使线性预测更可靠地提高接收机中的接收信号校正的精度，其应用于频偏补偿，相移补偿，同步移位调整，组合分集和其他信号值估计。

公开(公告)号：US06314304B1

公开(公告)日：2001-11-06

申请号：US08887048

申请日：1997-07-02

申请人： Mitsuru Uesugi

发明人： Mitsuru Uesugi

IPC分类号： H04Q720

CPC分类号： H04W16/12 ,  H04W16/02 ,  H04W16/24

摘要： An improved antenna arrangement for use in a cellular telecommunication system is provided. A plurality of antennas which are connected to a common base station are located on the periphery of a radio zone or cell. Each of the antennas has a directional characteristic oriented toward the center of the cell to cover the inside of the cell. This antenna arrangement minimizes the co-channel interference, thereby allowing the distance between cells to which the same channel is assigned to be shortened.

摘要翻译： 提供了一种用于蜂窝电信系统中的改进的天线布置。 连接到公共基站的多个天线位于无线电区域或小区的外围。 每个天线具有朝向小区的中心定向以覆盖小区内部的方向特性。 这种天线布置使同信道干扰最小化，从而允许缩短相同信道被分配到的小区之间的距离。

公开(公告)号：US6097259A

公开(公告)日：2000-08-01

申请号：US147053

申请日：1998-09-28

申请人： Yoshiko Saito ,  Mitsuru Uesugi

发明人： Yoshiko Saito ,  Mitsuru Uesugi

IPC分类号： H03M7/32 ,  H04L27/20 ,  H04L27/36

CPC分类号： H04L27/2092

摘要： A modulator and modulation method for orthogonally modulating digital baseband signals include interpolation filters that frequency convert the frequencies of an in-phase component and a quadrature phase component of a digital baseband signal to four times the frequency of an intermediate frequency. .DELTA..SIGMA. modulation circuits are provided and .DELTA..SIGMA. modulate the frequency converted signals. A low pass filter is provided to remove unnecessary components from the .DELTA..SIGMA. modulated signals. A switching circuit selects a signal that has passed through the low pass filter according to an order of an in-phase component, a code inverted component of a quadrature phase component, a code inverted component of the in-phase component and the quadrature phase component, and outputs these signals as a digital orthogonal signal. An N bit D/A converter converts the digital orthogonal signals into analog orthogonal signals.

摘要翻译： PCT No.PCT / JP98 / 00657 Sec。 371日期：1998年9月28日 102（e）日期1998年9月28日PCT提交1998年2月17日PCT公布。 第WO98 / 38775号公报 日期1998年9月3日用于对数字基带信号进行正交调制的调制器和调制方法包括将数字基带信号的同相分量和正交相位分量的频率频率转换成中频频率的四倍的内插滤波器。 提供DELTA SIGMA调制电路，DELTA SIGMA调制变频信号。 提供低通滤波器以从DELTA SIGMA调制信号中去除不必要的分量。 开关电路根据同相分量的顺序，正交相位分量的代码反相分量，同相分量的码反相分量和正交相位分量来选择已经通过低通滤波器的信号 并输出这些信号作为数字正交信号。 N位D / A转换器将数字正交信号转换为模拟正交信号。

公开(公告)号：US06032029A

公开(公告)日：2000-02-29

申请号：US822834

申请日：1997-03-24

申请人： Sadaki Futagi ,  Mitsuru Uesugi ,  Hiroshi Suzuki ,  Hitoshi Yoshino

发明人： Sadaki Futagi ,  Mitsuru Uesugi ,  Hiroshi Suzuki ,  Hitoshi Yoshino

IPC分类号： H03H17/02 ,  H04B3/06 ,  H04L25/03 ,  H04L27/22 ,  H04L27/227 ,  H04B1/10

CPC分类号： H04L27/22 ,  H04L25/03057

摘要： An equalizer block forming part of a receiver compensates transmission path characteristics of a baseband received signal to generate a prediction signal, and differential-logic-converts a demodulated signal generated by demodulating the prediction signal to generate a differential-logic-conversion demodulated signal. A differential-detection demodulator block differential-detects the prediction signal from the equalizer block and subsequently demodulates the differential-detected prediction signal to generate a differential-detection demodulated signal. A selector block selects either the differential-logic-conversion demodulated signal from the equalizer block or the differential-detection demodulated signal from the difference-detection demodulator block.

摘要翻译： 构成接收机的一部分的均衡器块补偿基带接收信号的传输路径特性，生成预测信号，对解调后的解调信号进行差分逻辑转换，生成差分逻辑转换解调信号。 差分检测解调器块差分检测来自均衡器块的预测信号，并随后解调差分检测的预测信号以产生差分检测解调信号。 选择器块选择来自均衡器块的差分逻辑转换解调信号或来自差分检测解调器块的差分检测解调信号。

公开(公告)号：US6002727A

公开(公告)日：1999-12-14

申请号：US951539

申请日：1997-10-16

申请人： Mitsuru Uesugi

发明人： Mitsuru Uesugi

IPC分类号： H04J13/00 ,  H03D1/04 ,  H04B1/10 ,  H04B1/68 ,  H04B1/7107 ,  H04B7/08 ,  H04W76/02 ,  H04W88/02

CPC分类号： H04B1/71072 ,  H04B1/692 ,  H04B1/7115

摘要： The interference signal cancellation system of the invention has: usual CDMA demodulators respectively disposed for codes, each of the CDMA demodulators having a matched filter 105 and an identifier 107; and a likelihood calculator 108 for each of the demodulators. The apparatus further has: a buffer 103 which stores provisional decision values; another buffer 109 which stores likelihoods; an order determining device 110 which determines an order in accordance with the likelihoods; a respreading device 111 which performs respreading in accordance with the determined order; a delay device 102 which delays a received signal; and a subtractor 112 which subtracts a result of the respreading from the delayed data. For each symbol, the largest likelihood is selected, and a replica is generated by using it. A desired performance is attained by performing one provisional decision and one demodulation. Therefore, computational complexity is reduced and realization is facilitated.

摘要翻译： 本发明的干扰信号消除系统具有：分别为代码设置的通常的CDMA解调器，每个CDMA解调器具有匹配滤波器105和标识符107; 以及每个解调器的似然度计算器108。 该装置还具有：存储临时判定值的缓冲器103; 存储可能性的另一缓冲器109; 订单确定装置110，其根据似然性确定订单; 根据确定的顺序执行重新发送的再生装置111; 延迟装置102，其延迟接收的信号; 以及从延迟数据中减去重新发现的结果的减法器112。 对于每个符号，选择最大的可能性，并通过使用它来生成副本。 通过执行一个临时决定和一个解调来获得期望的性能。 因此，减少了计算复杂度并促进了实现。

公开(公告)号：US5907303A

公开(公告)日：1999-05-25

申请号：US873705

申请日：1997-06-12

申请人： Hideki Yukitomo ,  Mitsuru Uesugi ,  Katsuhiko Hiramatsu

发明人： Hideki Yukitomo ,  Mitsuru Uesugi ,  Katsuhiko Hiramatsu

IPC分类号： H04L27/22 ,  G01S3/02 ,  G01S3/06 ,  H01Q3/26 ,  H04B7/005 ,  H04B7/08 ,  H04L1/02 ,  G01S3/16

CPC分类号： H01Q3/2605 ,  G01S3/06 ,  H04B7/0845 ,  G01S3/023

摘要： A CMA-based antenna system is disclosed which shows an improved receiving performance by reducing phase differences in the received signals which have been weighted. The CMA-based antenna system comprises a plurality of antenna, weight circuits, an adder, an error detector and a synthesis controller. The synthesis controller controls the weight circuits so as not only to make the adder output at a preset level but also to cause any differences among the weight circuit outputs not to increase. In order to cope with an error of symbol synchronization and a delayed wave, the CMA-based antenna system may further have a kind of equalizer inserted before the weight circuit in each antenna circuit.

摘要翻译： 公开了一种基于CMA的天线系统，其通过减少已经被加权的接收信号中的相位差来显示改进的接收性能。 基于CMA的天线系统包括多个天线，加权电路，加法器，误差检测器和综合控制器。 合成控制器控制加权电路，不仅使加法器的输出处于预设电平，而且也使得加权电路输出之间的任何差异不增加。 为了应对符号同步和延迟波的误差，基于CMA的天线系统还可以在每个天线电路中的加权电路之前进一步插入一种均衡器。