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92 条记录 (耗时 0.027 秒)

    SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    12.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
    半导体集成电路设备

    公开(公告)号：US20090250680A1

    公开(公告)日：2009-10-08

    申请号：US12487492

    申请日：2009-06-18

    申请人： Norikatsu Takaura ,  Hideyuki Matsuoka ,  Motoyasu Terao ,  Kenzo Kurotsuchi ,  Tsuyoshi Yamauchi

    发明人： Norikatsu Takaura ,  Hideyuki Matsuoka ,  Motoyasu Terao ,  Kenzo Kurotsuchi ,  Tsuyoshi Yamauchi

    IPC分类号： H01L47/00

    CPC分类号： H01L27/2436 ,  H01L27/2463 ,  H01L27/2472 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/16

    摘要： With a high-speed nonvolatile phase change memory, reliability in respect of the number of refresh times is enhanced. In a memory cell forming area of a phase change memory using a MISFET as a transistor for selection of memory cells, a phase change material layer of a memory cell comprising a resistor element, using a phase change material, is formed for common use. As a result, variation in shape and a change in composition of the phase change material, caused by isolation of memory cell elements by etching, are reduced, thereby enhancing reliability of memory cells, in respect of the number of refresh times.

    摘要翻译： 通过高速非易失性相变存储器，提高了刷新次数的可靠性。 在使用MISFET作为选择存储单元的晶体管的相变存储器的存储单元形成区域中，形成了使用相变材料的包括电阻元件的存储单元的相变材料层，用于常用。 结果，减少了通过蚀刻对存储单元元件的隔离而导致的相变材料的形状变化和组成变化，从而提高了存储单元的刷新次数的可靠性。

    Semiconductor integrated circuit device
    14.
    发明申请
    Semiconductor integrated circuit device 审中-公开
    半导体集成电路器件

    公开(公告)号：US20080048166A1

    公开(公告)日：2008-02-28

    申请号：US11907989

    申请日：2007-10-19

    申请人： Norikatsu Takaura ,  Hideyuki Matsuoka ,  Motoyasu Terao ,  Kenzo Kurotsuchi ,  Tsuyoshi Yamauchi

    发明人： Norikatsu Takaura ,  Hideyuki Matsuoka ,  Motoyasu Terao ,  Kenzo Kurotsuchi ,  Tsuyoshi Yamauchi

    IPC分类号： H01L47/00

    CPC分类号： H01L27/2436 ,  H01L27/2463 ,  H01L27/2472 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/16

    摘要： With a high-speed nonvolatile phase change memory, reliability in respect of the number of refresh times is enhanced. In a memory cell forming area of a phase change memory using a MISFET as a transistor for selection of memory cells, a phase change material layer of a memory cell comprising a resistor element, using a phase change material, is formed for common use. As a result, variation in shape and a change in composition of the phase change material, caused by isolation of memory cell elements by etching, are reduced, thereby enhancing reliability of memory cells, in respect of the number of refresh times.

    摘要翻译： 通过高速非易失性相变存储器，提高了刷新次数的可靠性。 在使用MISFET作为选择存储单元的晶体管的相变存储器的存储单元形成区域中，形成了使用相变材料的包括电阻元件的存储单元的相变材料层，用于常用。 结果，减少了通过蚀刻对存储单元元件的隔离而导致的相变材料的形状变化和组成变化，从而提高了存储单元的刷新次数的可靠性。

    Semiconductor integrated circuit device
    15.
    发明申请
    Semiconductor integrated circuit device 有权
    半导体集成电路器件

    公开(公告)号：US20060157680A1

    公开(公告)日：2006-07-20

    申请号：US11370945

    申请日：2006-03-09

    申请人： Norikatsu Takaura ,  Hideyuki Matsuoka ,  Motoyasu Terao ,  Kenzo Kurotsuchi ,  Tsuyoshi Yamauchi

    发明人： Norikatsu Takaura ,  Hideyuki Matsuoka ,  Motoyasu Terao ,  Kenzo Kurotsuchi ,  Tsuyoshi Yamauchi

    IPC分类号： H01L29/04

    CPC分类号： H01L27/2436 ,  H01L27/2463 ,  H01L27/2472 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/16

    摘要： With a high-speed nonvolatile phase change memory, reliability in respect of the number of refresh times is enhanced. In a memory cell forming area of a phase change memory using a MISFET as a transistor for selection of memory cells, a phase change material layer of a memory cell comprising a resistor element, using a phase change material, is formed for common use. As a result, variation in shape and a change in composition of the phase change material, caused by isolation of memory cell elements by etching, are reduced, thereby enhancing reliability of memory cells, in respect of the number of refresh times.

    摘要翻译： 通过高速非易失性相变存储器，提高了刷新次数的可靠性。 在使用MISFET作为选择存储单元的晶体管的相变存储器的存储单元形成区域中，形成了使用相变材料的包括电阻元件的存储单元的相变材料层，用于常用。 结果，减少了通过蚀刻对存储单元元件的隔离而导致的相变材料的形状变化和组成变化，从而提高了存储单元的刷新次数的可靠性。

    SEMICONDUCTOR DEVICE
    18.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20090014770A1

    公开(公告)日：2009-01-15

    申请号：US12169789

    申请日：2008-07-09

    申请人： Motoyasu Terao ,  Hideyuki Matsuoka ,  Naohiko Irie ,  Yoshitaka Sasago ,  Riichiro Takemura ,  Norikatsu Takaura

    发明人： Motoyasu Terao ,  Hideyuki Matsuoka ,  Naohiko Irie ,  Yoshitaka Sasago ,  Riichiro Takemura ,  Norikatsu Takaura

    IPC分类号： H01L29/00

    CPC分类号： H01L45/145 ,  G11C11/5614 ,  G11C13/0011 ,  G11C2213/11 ,  G11C2213/79 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/146

    摘要： A technique that can realize high integration even for multilayered three-dimensional structures at low costs by improving the performance of the semiconductor device having recording or switching functions by employing a device structure that enables high precision controlling of the movement of ions in the solid electrolyte. The semiconductor element of the device is formed as follows; two or more layers are deposited with different components respectively between a pair of electrodes disposed separately in the vertical (z-axis) direction, then a pulse voltage is applied between those electrodes to form a conductive path. The resistance value of the path changes according to an information signal. Furthermore, a region is formed at a middle part of the conductive path. The region is used to accumulate a component that improves the conductivity of the path, thereby enabling the resistance value (rate) to response currently to the information signal. More preferably, an electrode should also be formed at least in either the x-axis or y-axis direction to apply a control voltage to the electrode.

    摘要翻译： 通过采用能够高精度地控制固体电解质中的离子的运动的装置结构，通过提高具有记录或切换功能的半导体器件的性能，可以以低成本实现多层次三维结构的高集成度的技术。 器件的半导体元件如下形成; 分别在垂直（z轴）方向上分开设置的一对电极之间分别沉积两层或更多层，然后在这些电极之间施加脉冲电压以形成导电路径。 路径的电阻值根据信息信号而变化。 此外，在导电路径的中间部分形成区域。 该区域用于累积改善路径的导电性的分量，从而使电阻值（速率）能够当前响应于信息信号。 更优选地，电极也应至少形成在x轴方向或y轴方向上，以向电极施加控制电压。

    Semiconductor device with ion movement control
    19.
    发明授权
    Semiconductor device with ion movement control 有权
    半导体器件具有离子运动控制

    公开(公告)号：US07829930B2

    公开(公告)日：2010-11-09

    申请号：US12169789

    申请日：2008-07-09

    申请人： Motoyasu Terao ,  Hideyuki Matsuoka ,  Naohiko Irie ,  Yoshitaka Sasago ,  Riichiro Takemura ,  Norikatsu Takaura

    发明人： Motoyasu Terao ,  Hideyuki Matsuoka ,  Naohiko Irie ,  Yoshitaka Sasago ,  Riichiro Takemura ,  Norikatsu Takaura

    IPC分类号： H01L27/108

    CPC分类号： H01L45/145 ,  G11C11/5614 ,  G11C13/0011 ,  G11C2213/11 ,  G11C2213/79 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/146

    摘要： A technique that can realize high integration even for multilayered three-dimensional structures at low costs by improving the performance of the semiconductor device having recording or switching functions by employing a device structure that enables high precision controlling of the movement of ions in the solid electrolyte. The semiconductor element of the device is formed as follows; two or more layers are deposited with different components respectively between a pair of electrodes disposed separately in the vertical (z-axis) direction, then a pulse voltage is applied between those electrodes to form a conductive path. The resistance value of the path changes according to an information signal. Furthermore, a region is formed at a middle part of the conductive path. The region is used to accumulate a component that improves the conductivity of the path, thereby enabling the resistance value (rate) to response currently to the information signal. More preferably, an electrode should also be formed at least in either the x-axis or y-axis direction to apply a control voltage to the electrode.

    摘要翻译： 通过采用能够高精度地控制固体电解质中的离子的运动的装置结构，通过提高具有记录或切换功能的半导体器件的性能，可以以低成本实现多层次三维结构的高集成度的技术。 器件的半导体元件如下形成; 分别在垂直（z轴）方向上分开设置的一对电极之间分别沉积两层或更多层，然后在这些电极之间施加脉冲电压以形成导电路径。 路径的电阻值根据信息信号而变化。 此外，在导电路径的中间部分形成区域。 该区域用于累积改善路径的导电性的分量，从而使电阻值（速率）能够当前响应于信息信号。 更优选地，电极也应至少形成在x轴方向或y轴方向上，以向电极施加控制电压。

    Semiconductor device
    20.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US08618523B2

    公开(公告)日：2013-12-31

    申请号：US12302740

    申请日：2006-05-31

    申请人： Norikatsu Takaura ,  Yuichi Matsui ,  Motoyasu Terao ,  Yoshihisa Fujisaki ,  Nozomu Matsuzaki ,  Kenzo Kurotsuchi ,  Takahiro Morikawa

    发明人： Norikatsu Takaura ,  Yuichi Matsui ,  Motoyasu Terao ,  Yoshihisa Fujisaki ,  Nozomu Matsuzaki ,  Kenzo Kurotsuchi ,  Takahiro Morikawa

    IPC分类号： H01L47/00

    CPC分类号： G11C13/0004 ,  G11C8/08 ,  G11C13/0028 ,  G11C2213/79 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1625 ,  H01L45/1675

    摘要： On an insulating film (41) in which a plug (43) as a lower electrode is embedded, a laminated layer pattern of an insulating film (51) made of tantalum oxide, a recording layer (52) made of Ge—Sb—Te based chalcogenide to which indium is introduced and an upper electrode film (53) made of tungsten or tungsten alloy is formed, thereby forming a phase change memory. By interposing the insulating film (51) between the recording layer (52) and the plug (43), an effect of reducing programming current of a phase change memory and an effect of preventing peeling of the recording layer (52) can be achieved. Further, by using the Ge—Sb—Te based chalcogenide to which indium is introduced as the recording layer (52), the difference in work function between the insulating film (51) and the recording layer (52) is increased, and the programming voltage of the phase change memory can be reduced.

    摘要翻译： 在嵌入作为下电极的插头（43）的绝缘膜（41）上，由氧化钽构成的绝缘膜（51）的叠层图案，由Ge-Sb-Te制成的记录层（52） 引入铟的硫属化合物和由钨或钨合金制成的上电极膜（53），从而形成相变存储器。 通过将绝缘膜（51）插入在记录层（52）和插塞（43）之间，可以实现降低相变存储器的编程电流的效果和防止记录层（52）的剥离的效果。 此外，通过使用引入了铟的Ge-Sb-Te类硫族化物作为记录层（52），绝缘膜（51）和记录层（52）之间的功函数差增大，编程 可以减小相变存储器的电压。