Floating-point arithmetic processing apparatus
    11.
    发明授权
    Floating-point arithmetic processing apparatus 失效
    浮点算术处理装置

    公开(公告)号:US5931895A

    公开(公告)日:1999-08-03

    申请号:US789430

    申请日:1997-01-29

    CPC分类号: G06F5/012 G06F7/483

    摘要: A floating-point arithmetic processing apparatus has a circuit for generating a limit value for normalization shift by subtracting an exponent of the minimum value of a normalized number from a value of an exponent of an intermediate result, and a circuit for generating, as a normalization shift number, smaller one of a shift number necessary for making the mantissa of the intermediate result a normalized number and the limit value for normalization shift. The floating-point arithmetic processing apparatus further has a circuit having a circuit for detecting a condition for overflow before the rounding process and a circuit for generating a value in the case of overflow, so that a predetermined value is delivered as a final result only when the overflow condition is detected before the rounding process but in the other case, a result obtained by performing the normalization process and the rounding process is delivered. When no overflow takes place before the rounding process but overflow occurs after the rounding process, the result obtained by performing the normalization process and the rounding process is delivered as a final result.

    摘要翻译: 一种浮点运算处理装置,具有通过从中间结果的指数的值减去归一化数的最小值的指数来生成用于归一化偏移的极限值的电路,以及生成作为归一化的归一化的电路 移位数,使中间结果的尾数所需的移位数中的较小的一个是归一化数,以及归一化移位的极限值。 浮点运算处理装置还具有电路,该电路具有用于检测在舍入处理之前的溢出条件的电路和用于在溢出的情况下产生值的电路,从而仅当预定值仅在 在舍入处理之前检测到溢出条件,但是在另一种情况下,通过执行归一化处理和舍入处理获得的结果被传送。 在四舍五入处理之前没有发生溢出,而在舍入处理后发生溢出的情况下,通过执行归一化处理和舍入处理获得的结果作为最终结果被传递。

    Multiplying method and apparatus
    12.
    发明授权
    Multiplying method and apparatus 失效
    乘法法和装置

    公开(公告)号:US5909385A

    公开(公告)日:1999-06-01

    申请号:US831297

    申请日:1997-04-01

    CPC分类号: G06F7/5338

    摘要: A multiplying apparatus includes a Booth decoder for performing a second-order Booth decode on a multiplier, a Booth selector for generating a partial product except the two high-order digits from the output of the decoder and a multiplicand, a partial product corrector for correcting the two high-order digits of the partial product based on the multiplier and the multiplicand and outputting the corrected result, for cancelling a sign corrected portion of the negative partial product, and a carry save adder for being inputted with the outputs of the Booth selector and the outputs of the corrector and adding them.

    摘要翻译: 一种乘法装置,包括:用于在乘法器上执行二阶布斯解码的布斯解码器,用于从解码器的输出和被乘数产生除了两个高位数字之外的部分乘积的布斯选择器,用于校正的部分乘积校正器 基于乘法器和被乘数的部分乘积的两个高阶数字,并输出校正结果,用于取消负部分乘积的符号校正部分,以及进位保存加法器,用于输入布尔选择器的输出 和校正器的输出并添加它们。

    Image processing apparatus
    13.
    发明授权
    Image processing apparatus 失效
    图像处理装置

    公开(公告)号:US5586227A

    公开(公告)日:1996-12-17

    申请号:US855083

    申请日:1992-03-20

    IPC分类号: G06K15/00 G06F15/00

    摘要: An image processing apparatus which generates an output image based on inputted print data, includes a resolution converting device which converts image data corresponding to the inputted print data at a first resolution into image data having a second resolution. The image conversion device includes a plurality of arithmetic processing units each of which performs computations which differ from the others, with one of the plurality of arithmetic processing unit being selected in dependence upon a recording density set for recording the output image. In other aspects, the resolution conversion computation can be input into the device from an external device. In situations where the generated output image is recorded on a pulse-width-modulated device, such as a laser beam printer, it is possible to control the pulse-width based on the density set for recording.

    摘要翻译: 一种基于输入的打印数据生成输出图像的图像处理装置,包括分辨率转换装置,其以与第一分辨率对应的输入的打印数据的图像数据转换为具有第二分辨率的图像数据。 图像转换装置包括多个算术处理单元,每个运算处理单元执行与其他运算不同的计算,其中,根据为记录输​​出图像设置的记录密度来选择多个算术处理单元中的一个。 在其他方面,分辨率转换计算可以从外部设备输入到设备中。 在产生的输出图像被记录在诸如激光束打印机的脉冲宽度调制装置的情况下,可以基于为记录设置的密度来控制脉冲宽度。

    SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR OPERATING SAME
    20.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR OPERATING SAME 有权
    半导体集成电路及其工作方法

    公开(公告)号:US20140032860A1

    公开(公告)日:2014-01-30

    申请号:US14110786

    申请日:2011-04-21

    IPC分类号: G06F12/02

    摘要: First data to be written which is output from a function module (2) is supplied to a built-in memory (3) and a first buffer memory (11), and second data to be written which is output from the function module (2) is supplied to the built-in memory (3) and a second buffer memory (12). The first and second FIFO memories (13, 14) select and store data items having a predetermined number of outputs from a plurality of first and second output data items which are sequentially output from the first and second buffer memories (11, 12), and do not select other data items. A comparator (15) compares the data items having the predetermined number of outputs which are selected and are output by the first and second FIFO memories (13, 14) with each other.

    摘要翻译: 从功能模块(2)输出的要写入的第一数据被提供给内置存储器(3)和第一缓冲存储器(11),以及从功能模块(2)输出的要写入的第二数据 )被提供给内置存储器(3)和第二缓冲存储器(12)。 第一和第二FIFO存储器(13,14)从从第一和第二缓冲存储器(11,12)顺次输出的多个第一和第二输出数据项中选择并存储具有预定数量的输出的数据项,以及 不要选择其他数据项。 比较器(15)将由第一和第二FIFO存储器(13,14)输出的具有预定数量的输出的数据项彼此进行比较。