公开(公告)号：US11456365B2

公开(公告)日：2022-09-27

申请号：US17157350

申请日：2021-01-25

申请人： LONGITUDE FLASH MEMORY SOLUTIONS LTD.

发明人： Igor Polishchuk ,  Sagy Charel Levy ,  Krishnaswamy Ramkumar

IPC分类号： H01L21/02 ,  H01L27/11563 ,  H01L29/00 ,  G11C16/04 ,  H01L29/423 ,  H01L21/28 ,  H01L29/792 ,  H01L29/51 ,  H01L29/66 ,  B82Y10/00 ,  H01L27/11526 ,  H01L29/49 ,  H01L29/06 ,  H01L27/11568 ,  H01L27/11573 ,  H01L27/11575

摘要： An example memory device includes a channel positioned between and electrically connecting a first diffusion region and a second diffusion region, and a tunnel dielectric layer, a multi-layer charge trapping layer, and a blocking dielectric layer disposed between the gate structure and the channel. The multi-layer charge trapping layer includes a first dielectric layer disposed abutting a second dielectric layer and an anti-tunneling layer disposed between the first and second dielectric layers. The anti-tunneling layer includes an oxide layer. The first dielectric layer includes oxygen-rich nitride and the second dielectric layer includes oxygen-lean nitride.

公开(公告)号：US20200303563A1

公开(公告)日：2020-09-24

申请号：US16840751

申请日：2020-04-06

申请人： LONGITUDE FLASH MEMORY SOLUTIONS LTD.

发明人： Igor Polishchuk ,  Sagy Charel Levy ,  Krishnaswamy Ramkumar

IPC分类号： H01L29/792 ,  H01L21/28 ,  B82Y10/00 ,  H01L29/51 ,  H01L29/66 ,  H01L27/11578 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786

摘要： An embodiment of a nonvolatile charge trap memory device is described. In one embodiment, the device comprises a channel comprising silicon overlying a surface on a substrate electrically connecting a first diffusion region and a second diffusion region of the memory device, and a gate stack intersecting and overlying at least a portion of the channel, the gate stack comprising a tunnel oxide abutting the channel, a split charge-trapping region abutting the tunnel oxide, and a multi-layer blocking dielectric abutting the split charge-trapping region. The split charge-trapping region includes a first charge-trapping layer comprising a nitride closer to the tunnel oxide, and a second charge-trapping layer comprising a nitride overlying the first charge-trapping layer. The multi-layer blocking dielectric comprises at least a high-K dielectric layer.

公开(公告)号：US11721733B2

公开(公告)日：2023-08-08

申请号：US17366934

申请日：2021-07-02

申请人： LONGITUDE FLASH MEMORY SOLUTIONS LTD.

发明人： Igor Polishchuk ,  Sagy Charel Levy ,  Krishnaswamy Ramkumar

IPC分类号： H01L21/28 ,  H01L29/423 ,  G11C16/04 ,  H01L29/792 ,  H01L29/51 ,  H01L29/66 ,  B82Y10/00 ,  H10B41/40 ,  H10B43/00 ,  H10B43/30 ,  H10B43/40 ,  H10B43/50 ,  H01L29/49 ,  H01L21/02 ,  H01L29/06

CPC分类号： H01L29/4234 ,  B82Y10/00 ,  G11C16/0466 ,  H01L21/0214 ,  H01L21/02532 ,  H01L21/02595 ,  H01L29/0649 ,  H01L29/0676 ,  H01L29/40117 ,  H01L29/42344 ,  H01L29/4916 ,  H01L29/511 ,  H01L29/512 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66795 ,  H01L29/66833 ,  H01L29/792 ,  H01L29/7926 ,  H10B41/40 ,  H10B43/00 ,  H10B43/30 ,  H10B43/40 ,  H10B43/50

摘要： Semiconductor devices including non-volatile memory transistors and methods of fabricating the same to improve performance thereof are provided. In one embodiment, the memory transistor comprises an oxide-nitride-oxide (ONO) stack on a surface of a semiconductor substrate, and a high work function gate electrode formed over a surface of the ONO stack. Preferably, the gate electrode comprises a doped polysilicon layer, and the ONO stack comprises multi-layer charge storing layer including at least a substantially trap free bottom oxynitride layer and a charge trapping top oxynitride layer. More preferably, the device also includes a metal oxide semiconductor (MOS) logic transistor formed on the same substrate, the logic transistor including a gate oxide and a high work function gate electrode. In certain embodiments, the dopant is a P+ dopant and the memory transistor comprises N-type (NMOS) silicon-oxide-nitride-oxide-silicon (SONOS) transistor while the logic transistor a P-type (PMOS) transistor. Other embodiments are also disclosed.

公开(公告)号：US10446656B2

公开(公告)日：2019-10-15

申请号：US15376282

申请日：2016-12-12

申请人： LONGITUDE FLASH MEMORY SOLUTIONS LTD.

发明人： Igor Polishchuk ,  Sagy Charel Levy ,  Krishnaswamy Ramkumar

IPC分类号： H01L27/00 ,  H01L29/00 ,  H01L29/423 ,  H01L29/792 ,  H01L29/51 ,  H01L29/66 ,  B82Y10/00 ,  H01L21/28 ,  H01L27/11526 ,  G11C16/04 ,  H01L27/11563 ,  H01L29/49 ,  H01L21/02 ,  H01L29/06 ,  H01L27/11568 ,  H01L27/11573 ,  H01L27/11575

摘要： Semiconductor devices including non-volatile memory transistors and methods of fabricating the same to improve performance thereof are provided. In one embodiment, the memory transistor comprises an oxide-nitride-oxide (ONO) stack on a surface of a semiconductor substrate, and a high work function gate electrode formed over a surface of the ONO stack. Preferably, the gate electrode comprises a doped polysilicon layer, and the ONO stack comprises multi-layer charge storing layer including at least a substantially trap free bottom oxynitride layer and a charge trapping top oxynitride layer. More preferably, the device also includes a metal oxide semiconductor (MOS) logic transistor formed on the same substrate, the logic transistor including a gate oxide and a high work function gate electrode. In certain embodiments, the dopant is a P+ dopant and the memory transistor comprises N-type (NMOS) silicon-oxide-nitride-oxide-silicon (SONOS) transistor while the logic transistor a P-type (PMOS) transistor. Other embodiments are also disclosed.