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    Static random access memory utilizing gated diode technology
    11.
    发明申请
    Static random access memory utilizing gated diode technology 有权
    采用门控二极管技术的静态随机存取存储器

    公开(公告)号：US20060198181A1

    公开(公告)日：2006-09-07

    申请号：US11067797

    申请日：2005-02-28

    申请人： Wing Luk ,  Leland Chang

    发明人： Wing Luk ,  Leland Chang

    IPC分类号： G11C11/00

    CPC分类号： G11C11/413

    摘要： A new type of static RAM cell is disclosed that is based on a gated diode and its voltage amplification characteristic. The cell combines the advantages of a static RAM, in which data refresh is not needed, and those of gated diode cells, which are scalable to low voltages, have high signal to noise ratio, high signal margin, and tolerance to process variations, to form a single high performance static memory cell. This new cell has independent read and write paths, which allow for separate optimization of the read (R) and write (W) events, and enable dual-port R/W operation. Furthermore, storage node disturbance during the read and write operations are eliminated, which greatly improves cell stability and scalability for future technologies.

    摘要翻译： 公开了一种基于门控二极管及其电压放大特性的新型静态RAM单元。 该单元结合了不需要数据刷新的静态RAM和可扩展到低电压的门控二极管单元的优点具有高信噪比，高信号余量和对工艺变化的公差， 形成单个高性能静态存储单元。 这个新单元格具有独立的读写路径，允许单独优化读（R）和写（W）事件，并启用双端口R / W操作。 此外，消除了在读取和写入操作期间的存储节点干扰，这大大地改善了用于未来技术的小区稳定性和可扩展性。

    Intelligent switching for secure and reliable voice-over-IP PBX service
    12.
    发明申请
    Intelligent switching for secure and reliable voice-over-IP PBX service 有权
    智能交换，用于安全可靠的话音IP PBX业务

    公开(公告)号：US20070041373A1

    公开(公告)日：2007-02-22

    申请号：US11206085

    申请日：2005-08-18

    申请人： Kar-Wing Lor ,  Wing Luk ,  Kwan Shum

    发明人： Kar-Wing Lor ,  Wing Luk ,  Kwan Shum

    IPC分类号： H04L12/66

    CPC分类号： H04L45/00 ,  H04L29/06027 ,  H04L47/20 ,  H04L47/2416 ,  H04L47/32 ,  H04L65/1069 ,  H04M3/42314 ,  H04M7/006

    摘要： A switching apparatus for switching packetized voice traffic between a plurality of communication devices, the switching apparatus comprises a multi-layer switch, a plurality of communication ports, control means and ingress processing means, said packetized voice traffic comprises call control packets and medium packets which are exchanged between the communication devices via said communication ports, wherein medium packet traffic from a first communication device to a second communication device is split into a first call segment and a second call segment, the first call segment originates from said first communication devices and terminates at said switching apparatus, the second call segment originates from said switching apparatus and terminates at said second communication device, each medium packet from said first communication device is processed by said ingress processing means of said switching apparatus before onward transmission to said second communication device.

    摘要翻译： 一种用于在多个通信设备之间切换分组语音业务的交换设备，所述交换设备包括多层交换机，多个通信端口，控制装置和入口处理装置，所述分组语音业务包括呼叫控制分组和媒体分组， 经由所述通信端口在通信设备之间交换，其中从第一通信设备到第二通信设备的中分组业务被分为第一呼叫段和第二呼叫段，第一呼叫段来自所述第一通信设备并终止 在所述交换装置中，所述第二呼叫段起始于所述交换设备，并终止于所述第二通信设备，所述第一通信设备的每个媒体分组由所述交换设备的所述入口处理装置在向前发送到所述第二通信设备之前进行处理。

    Logic circuits utilizing gated diode sensing
    14.
    发明申请
    Logic circuits utilizing gated diode sensing 有权
    采用门控二极管感应的逻辑电路

    公开(公告)号：US20060192591A1

    公开(公告)日：2006-08-31

    申请号：US11067825

    申请日：2005-02-28

    申请人： Wing Luk

    发明人： Wing Luk

    IPC分类号： H03K19/084

    CPC分类号： H03K19/09421 ,  H03K19/0963

    摘要： A family of logic circuits, called gated diode logic circuits, is disclosed wherein small amplitude signals, typically a fraction of the supply voltage, can be sensed and amplified by applying a small amplitude signal to a gate of a gated diode in a sampling mode and changing a voltage of a source of the gated diode in an evaluation mode. One or more isolation devices may be connected between each small amplitude signal and a gate of the gated diode, wherein the isolation device passes the small amplitude signal to the gate of the gated diode in the sampling mode, and isolates the small amplitude signal from the gate in the evaluation mode for amplification and performing fast logic operations (logic functions). The disclosed gated diode logic circuits overcome the Vt variation problem in FETs by detecting and amplifying the small logic signals utilizing gated diodes that have relatively low Vt variation. The amplified signals may then be processed by conventional logic circuits to perform certain logic functions in a gated diode logic circuit. The Vt variation of the gated diode is relatively small compared to the small logic signal amplitude and can be controlled relatively precisely. Typically, Vt of the gated diode can be set to a fraction of the small logic signal amplitude. Thus, in a gated diode logic circuit, the gated diode circuit can sense and amplify the small logic signals sufficiently to perform the various logic operations in conjunction with conventional logic circuits. The output(s) of the gated diode logic circuit can be of a standard full CMOS voltage swing, or can be scaled down in amplitude and further processed by other gated diode logic circuits.

    摘要翻译： 公开了一种称为门控二极管逻辑电路的逻辑电路，其中通过以采样模式将小振幅信号施加到门控二极管的栅极，可以感测和放大小振幅信号，通常为电源电压的一小部分， 在评估模式下改变门控二极管的源极的电压。 每个小振幅信号和门控二极管的栅极之间可以连接一个或多个隔离器件，其中隔离器件以采样模式将小振幅信号传递到门控二极管的栅极，并将小振幅信号与 门在评估模式下进行放大并执行快速逻辑运算（逻辑功能）。 公开的门控二极管逻辑电路通过利用具有相对较低V 0变化的门控二极管检测和放大小逻辑信号来克服FET中的V 0变化问题。 然后，放大的信号可以由常规逻辑电路来处理，以在门控二极管逻辑电路中执行某些逻辑功能。 门控二极管的V OUT变化与小逻辑信号幅度相比相对较小，并且可以被相对精确地控制。 通常，门控二极管的V OUT可以被设置为小逻辑信号幅度的一部分。 因此，在门控二极管逻辑电路中，门控二极管电路可以充分感测和放大小逻辑信号，以结合常规逻辑电路执行各种逻辑运算。 门控二极管逻辑电路的输出可以是标准的全CMOS电压摆幅，或者可以在幅度上缩小，并由其他门控二极管逻辑电路进一步处理。

    System and method for variable array architecture for memories
    15.
    发明申请
    System and method for variable array architecture for memories 有权
    用于存储器的可变阵列架构的系统和方法

    公开(公告)号：US20050144373A1

    公开(公告)日：2005-06-30

    申请号：US10748333

    申请日：2003-12-31

    申请人： Toshiaki Kirihata ,  Gerhard Mueller ,  Wing Luk

    发明人： Toshiaki Kirihata ,  Gerhard Mueller ,  Wing Luk

    IPC分类号： G06F12/00 ,  G06F13/16

    CPC分类号： G06F13/1694 ,  Y02D10/14

    摘要： A memory system that employs simultaneous activation of at least two dissimilar memory arrays, during a data manipulation, such as read or write operations is disclosed. An exemplary embodiment includes a memory system containing a plurality of arrays, each in communication with a common controller, wherein the arrays are activated by different supply voltage (Vdd). When a processor sends a command to retrieve or write data to the memory system, two or more arrays are addressed to supply the required data. By proper partitioning of the data between dissimilar arrays, the efficiency of data reading is improved.

    摘要翻译： 公开了一种在诸如读取或写入操作的数据操作期间同时激活至少两个不同的存储器阵列的存储器系统。 示例性实施例包括包含多个阵列的存储器系统，每个阵列与公共控制器通信，其中阵列由不同的电源电压（Vdd）激活。 当处理器发送命令以检索或写入数据到存储器系统时，寻址两个或更多个阵列以提供所需的数据。 通过在不同阵列之间适当分割数据，数据读取的效率得到提高。

    Dynamic memory cell structures
    16.
    发明申请
    Dynamic memory cell structures 有权
    动态存储单元结构

    公开(公告)号：US20070249115A1

    公开(公告)日：2007-10-25

    申请号：US11408752

    申请日：2006-04-21

    申请人： Wing Luk ,  Jin Cai

    发明人： Wing Luk ,  Jin Cai

    IPC分类号： H01L21/8244 ,  H01L29/94

    CPC分类号： G11C11/4097 ,  G11C7/18 ,  G11C8/16 ,  G11C11/405 ,  H01L21/28079 ,  H01L21/84 ,  H01L27/10873 ,  H01L29/495

    摘要： A dynamic random access memory cell is disclosed that comprises a capacitive storage device and a write access transistor. The write access transistor is operatively coupled to the capacitive storage device and has a gate stack that comprises a high-K dielectric, wherein the high-K dielectric has a dielectric constant greater than a dielectric constant of silicon dioxide. Also disclosed are a memory array using the cells, a computing apparatus using the memory array, a method of storing data, and a method of manufacturing.

    摘要翻译： 公开了一种动态随机存取存储器单元，其包括电容存储器件和写入存取晶体管。 写入存取晶体管可操作地耦合到电容存储器件，并且具有包括高K电介质的栅极堆叠，其中高K电介质具有大于二氧化硅介电常数的介电常数。 还公开了使用这些单元的存储器阵列，使用存储器阵列的计算装置，存储数据的方法和制造方法。