LIGHT-EMITTING DIODE STRUCTURE
    11.
    发明申请

    公开(公告)号:US20220359794A1

    公开(公告)日:2022-11-10

    申请号:US17659662

    申请日:2022-04-19

    Abstract: A light-emitting diode structure includes a light-emitting part and a reflective part. The light-emitting part has a light-emitting surface. The reflective part is on the light-emitting part opposite to the light-emitting surface. The reflective part is a gradient distributed Bragg reflection structure and includes a plurality of first dielectric layers and a plurality of second dielectric layers. The second dielectric layers have a refractive index different from that of the first dielectric layer, and are alternately stacked with the first dielectric layers. Each of the first dielectric layers has a different optical thickness, and each of the second dielectric layers has a different optical thickness. The optical thicknesses of the first dielectric layers and the second dielectric layers vary in a gradient way away from the light-emitting part.

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    12.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
    制造半导体器件的方法

    公开(公告)号:US20150188009A1

    公开(公告)日:2015-07-02

    申请号:US14304817

    申请日:2014-06-13

    CPC classification number: H01L33/0095

    Abstract: The present disclosure provides a method of manufacturing a semiconductor device, including providing a semiconductor structure including a sequential stack of an n-type semiconductor layer, an active layer, and a p-type semiconductor layer. A first metal layer and a second metal layer on the first metal layer are formed on the semiconductor structure. A heat treatment process is performed, such that the first metal layer is oxidized to form a first metal oxide layer and the second metal layer is reversed to form a second metallic compound layer between the first metal oxide layer and the p-type semiconductor layer. The first metal oxide layer and the second metallic compound layer are removed. A mesa etching process is performed after performing the heat treatment process, to form a mesa region exposing a part of the n-type semiconductor layer.

    Abstract translation: 本公开提供一种制造半导体器件的方法,包括提供包括n型半导体层,有源层和p型半导体层的顺序堆叠的半导体结构。 第一金属层上的第一金属层和第二金属层形成在半导体结构上。 执行热处理工艺,使得第一金属层被氧化以形成第一金属氧化物层,并且第二金属层反转以在第一金属氧化物层和p型半导体层之间形成第二金属化合物层。 去除第一金属氧化物层和第二金属化合物层。 在进行热处理工艺之后进行台面蚀刻工艺,以形成暴露n型半导体层的一部分的台面区域。

    LIGHT EMITTING DIODE PACKAGE
    13.
    发明申请

    公开(公告)号:US20210257521A1

    公开(公告)日:2021-08-19

    申请号:US17308070

    申请日:2021-05-05

    Abstract: A light emitting diode (LED) package includes a substrate, at least one micro LED chip, a black material layer, and a transparent material layer. The substrate has a width ranging from 100 micrometers to 1000 micrometers. The at least one micro LED chip is electrically mounted on a top surface of the substrate and has a width ranging from 1 micrometer to 100 micrometers. The black material layer covers the top surface of the substrate to expose the at least one micro LED chip. The transparent material layer covers the at least one micro LED chip and the black material layer.

    LIGHT EMITTING DIODE PACKAGE
    14.
    发明申请

    公开(公告)号:US20210111313A1

    公开(公告)日:2021-04-15

    申请号:US16600577

    申请日:2019-10-14

    Abstract: A light emitting diode (LED) package includes a substrate, at least one micro LED chip, a black material layer, and a transparent material layer. The substrate has a width ranging from 100 micrometers to 1000 micrometers. The at least one micro LED chip is electrically mounted on a top surface of the substrate and has a width ranging from 1 micrometer to 100 micrometers. The black material layer covers the top surface of the substrate to expose the at least one micro LED chip. The transparent material layer covers the at least one micro LED chip and the black material layer.

    LIGHT-EMITTING DIODE CHIP
    16.
    发明申请
    LIGHT-EMITTING DIODE CHIP 有权
    发光二极管芯片

    公开(公告)号:US20150255681A1

    公开(公告)日:2015-09-10

    申请号:US14325215

    申请日:2014-07-07

    CPC classification number: H01L33/405 H01L33/44

    Abstract: A light-emitting diode (LED) chip is disclosed. The chip includes a light-emitting diode and an electrode layer on the light-emitting diode. The electrode layer includes a reflective metal layer. The reflective metal layer includes a first composition and a second composition. The first composition includes aluminum or silver, and the second composition includes copper, silicon, tin, platinum, gold or a combination thereof. The weight percentage of the second composition is greater than 0% and less than 20%.

    Abstract translation: 公开了一种发光二极管(LED)芯片。 该芯片包括发光二极管和发光二极管上的电极层。 电极层包括反射金属层。 反射金属层包括第一组合物和第二组合物。 第一组合物包括铝或银,第二组合物包括铜,硅,锡,铂,金或其组合。 第二组合物的重量百分比大于0%且小于20%。

    LIGHT EMITTING DIODE STRUCTURE
    17.
    发明申请
    LIGHT EMITTING DIODE STRUCTURE 审中-公开
    发光二极管结构

    公开(公告)号:US20150115309A1

    公开(公告)日:2015-04-30

    申请号:US14493478

    申请日:2014-09-23

    CPC classification number: H01L33/40

    Abstract: A light emitting diode structure includes a substrate, an N-type semiconductor layer, a light emitting layer, a P-type semiconductor layer, a composite conductive layer, a first electrode, and a second electrode. The N-type semiconductor layer is located on the substrate. The light emitting layer is located on a portion of the N-type semiconductor layer. The P-type semiconductor layer is located on the light emitting layer. The composite conductive layer sequentially has a first conductive layer, a second conductive layer, and a third conductive layer. The first conductive layer is attached to the P-type semiconductor layer, and the resistance of the first conductive layer is greater than the resistance of the third conductive layer. The first electrode is located on the third conductive layer. The second electrode is located on another portion of the N-type semiconductor layer that is not covered by the light emitting layer.

    Abstract translation: 发光二极管结构包括衬底,N型半导体层,发光层,P型半导体层,复合导电层,第一电极和第二电极。 N型半导体层位于基板上。 发光层位于N型半导体层的一部分上。 P型半导体层位于发光层上。 复合导电层依次具有第一导电层,第二导电层和第三导电层。 第一导电层附接到P型半导体层,第一导电层的电阻大于第三导电层的电阻。 第一电极位于第三导电层上。 第二电极位于未被发光层覆盖的N型半导体层的另一部分上。

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