公开(公告)号：US11374099B2

公开(公告)日：2022-06-28

申请号：US16930505

申请日：2020-07-16

申请人： MACRONIX INTERNATIONAL CO., LTD.

发明人： Ting-Feng Liao ,  Sheng-Hong Chen ,  Kuang-Wen Liu

IPC分类号： H01L29/417 ,  H01L21/768 ,  H01L23/535 ,  H01L27/11582

摘要： A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure includes a source line structure. The source line structure includes a composite material formed in a trench. The composite material includes an oxide portion and a metal portion.

公开(公告)号：US20190157289A1

公开(公告)日：2019-05-23

申请号：US15818972

申请日：2017-11-21

申请人： MACRONIX INTERNATIONAL CO., LTD.

发明人： Ting-Feng Liao

IPC分类号： H01L27/11582 ,  H01L29/06 ,  H01L27/11556 ,  H01L23/528 ,  H01L23/532 ,  H01L29/10 ,  H01L21/762 ,  H01L21/768

摘要： A semiconductor structure includes a plurality of sub-array structures separated from each other by a plurality of isolation structures. The semiconductor structure further includes a three-dimensional array of memory cells. The memory cells include a plurality of cell groups disposed in the sub-array structures, respectively. The semiconductor structure further includes a plurality of conductive structures. Each of the conductive structures includes a plurality of conductive columns correspondingly disposed in each of the isolation structures along an extending direction of the isolation structures. The conductive columns penetrate through the each of the isolation structures. Each of the conductive columns has a circular cross section.

公开(公告)号：US20180294273A1

公开(公告)日：2018-10-11

申请号：US15481676

申请日：2017-04-07

申请人： MACRONIX INTERNATIONAL CO., LTD.

发明人： Ting-Feng Liao ,  Yi-Chen Wang

IPC分类号： H01L27/11556 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  G11C16/04

CPC分类号： H01L27/11556 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53204 ,  H01L23/53295

摘要： A memory device includes a semiconductor substrate, a first conductive layer, a plurality of second conductive layers, a plurality insulating layers, at least one contact plug and at least one dummy plug. The first conductive layer is disposed on the semiconductor substrate. The insulating layers are disposed on the first conductive layer. The second conductive layers are alternatively stacked with the insulating layers and insulated from the first conductive layer. The contact plug passes through the insulating layers and the second conductive layers, insulates from the second conductive layers and electrically contacts to the first conductive layer. The dummy plug, corresponds to the at least one contact plug, passes through the insulating layers and the second conductive layers, and insulates from the second conductive layers and the first conductive layer.

公开(公告)号：US20180261621A1

公开(公告)日：2018-09-13

申请号：US15455185

申请日：2017-03-10

申请人： MACRONIX INTERNATIONAL CO., LTD.

发明人： Sheng-Hong Chen ,  Ting-Feng Liao

IPC分类号： H01L27/11582 ,  H01L23/522 ,  H01L23/532 ,  H01L23/528 ,  H01L21/768

CPC分类号： H01L27/11582

摘要： A semiconductor structure includes a substrate and a plurality of sub-array structures disposed on the substrate. The sub-array structures separated from each other by a plurality of trenches. The semiconductor structure includes a three-dimensional array of memory cells. The memory cells include a plurality of cell groups disposed in the sub-array structures, respectively. The semiconductor structure further includes a plurality of support pillars and a plurality of conductive pillars disposed in the trenches. The support pillars and the conductive pillars in each of the trenches are alternately arranged in an extending direction of the trenches. The semiconductor structure further includes a plurality of conductive lines disposed in the trenches and on the support pillars and the conductive pillars. Each of the conductive lines connects the conductive pillars thereunder.