公开(公告)号：US20230205453A1

公开(公告)日：2023-06-29

申请号：US18170753

申请日：2023-02-17

Applicant: MICRON TECHNOLOGY, INC.

Inventor： DAVID HULTON ,  JEREMY CHRITZ ,  TAMARA SCHMITZ

IPC: G06F3/06 ,  G06F13/16 ,  H04L9/06 ,  G06N3/08 ,  G06F18/214 ,  G06F18/2413

CPC classification number: G06F3/0658 ,  G06F3/0679 ,  G06F3/0607 ,  G06F13/1668 ,  H04L9/0643 ,  G06N3/08 ,  G06F18/2155 ,  G06F18/24147 ,  G06F2213/0026

Abstract: Examples of systems and method described herein provide for the processing of image codes (e.g., a binary embedding) at a memory system including a Hamming processing unit. Such images codes may generated by various endpoint computing devices, such as Internet of Things (IoT) computing devices, Such devices can generate a Hamming processing request, having an image code of the image, to compare that representation of the image to other images (e.g., in an image dataset) to identify a match or a set of neural network results. Advantageously, examples described herein may be used in neural networks to facilitate the processing of datasets, so as to increase the rate and amount of processing of such datasets. For example, comparisons of image codes can be performed “closer” to the memory devices, e.g., at a processing unit having memory devices.

公开(公告)号：US20220171887A1

公开(公告)日：2022-06-02

申请号：US17108934

申请日：2020-12-01

Applicant: MICRON TECHNOLOGY, INC.

Inventor： JEREMY CHRITZ ,  DAVID HULTON

IPC: G06F21/79 ,  G06F21/31 ,  G06F21/60 ,  H04L9/06 ,  G06F12/14 ,  G06F13/16

Abstract: Examples of systems and method described herein or generating, in a memory controller and/or memory device, access codes for memory regions of the memory device using authentication logic, and for accessing the memory device using the access codes. For example, a memory controller and/or a coupled memory device may generate access codes that a host computing device may include in a memory access request to access one or more memory regions of the memory device. Data read or written at the memory device may in some examples only be accessed in accordance with the access codes for memory regions of the memory device. Accordingly, the systems and methods described herein may provide security for specific memory regions of a memory device because the access code are updated periodically (e.g., based on obtained reset indication) or in accordance with an updated count value from a counter.

公开(公告)号：US20220171634A1

公开(公告)日：2022-06-02

申请号：US17673712

申请日：2022-02-16

Applicant: MICRON TECHNOLOGY, INC.

Inventor： JEREMY CHRITZ ,  TAMARA SCHMITZ ,  FA-LONG LUO ,  DAVID HULTON

IPC: G06F9/448 ,  G06F9/38 ,  G06F12/0842 ,  G06F15/82 ,  G06F9/50

Abstract: Methods, apparatuses, and systems for implementing data flows in a processor are described herein. A data flow manager may be configured to generate a configuration packet for a compute operation based on status information regarding multiple processing elements of the processor. Accordingly, multiple processing elements of a processor may concurrently process data flows based on the configuration packet. For example, the multiple processing elements may implement a mapping of processing elements to memory, while also implementing identified paths, through the processor, for the data flows. After executing the compute operation at certain processing elements of the processor, the processing results may be provided. In speech signal processing operations, the processing results may be compared to phonemes to identify such components of human speech in the processing results. Once dynamically identified, the processing elements may continue comparing additional components of human speech to facilitate processing of an audio recording, for example.

公开(公告)号：US20220171545A1

公开(公告)日：2022-06-02

申请号：US17108904

申请日：2020-12-01

Applicant: MICRON TECHNOLOGY, INC.

Inventor： JEREMY CHRITZ ,  DAVID HULTON

IPC: G06F3/06 ,  G06F12/0877 ,  H04L9/06

Abstract: Examples of systems and method described herein provide for accessing memory devices and, concurrently, generating access codes using an authenticated stream cipher at a memory controller. For example, a memory controller may use a memory access request to, concurrently, perform translation logic and/or error correction on data associated with the memory access request; while also utilizing the memory address as an initialization vector for an authenticated stream cipher to generate an access code. The error correction may be performed subsequent to address translation for a write operation (or prior to address translation for a read operation) to improve processing speed of memory access requests at a memory controller; while the memory controller also generates the encrypted access code.

公开(公告)号：US20220076073A1

公开(公告)日：2022-03-10

申请号：US17016074

申请日：2020-09-09

Applicant: MICRON TECHNOLOGY, INC.

Inventor： DAVID HULTON ,  JEREMY CHRITZ

IPC: G06K9/62 ,  G06N3/08 ,  G06F9/30

Abstract: Examples of systems and method described herein provide for the processing of image codes (e.g., a binary embedding) at a memory die. Such images codes may generated by various endpoint computing devices, such as Internet of Things (IoT) computing devices. Such devices can generate a Hamming processing command, having an image code of the image, to compare that representation of the image to other images (e.g., in an image dataset) to identify a match or a set of neural network results. Advantageously, examples described herein may be used in neural networks to facilitate the processing of datasets, so as to increase the rate and amount of processing of such datasets. For example, comparisons of image codes can be performed on a memory die itself, like a memory die of a NAND memory device.

公开(公告)号：US20220075724A1

公开(公告)日：2022-03-10

申请号：US17016053

申请日：2020-09-09

Applicant: MICRON TECHNOLOGY, INC.

Inventor： DAVID HULTON ,  JEREMY CHRITZ

IPC: G06F12/0802 ,  G06F13/16

Abstract: Examples of systems and method described herein provide for the processing of image codes (e.g., a binary embedding) at a memory controller with various memory devices. Such images codes may generated by various endpoint computing devices, such as Internet of Things (IoT) computing devices, Such devices can generate a Hamming processing request, having an image code of the image, to compare that representation of the image to other images (e.g., in an image dataset) to identify a match or a set of neural network results. Advantageously, examples described herein may be used in neural networks to facilitate the processing of datasets, so as to increase the rate and amount of processing of such datasets. For example, comparisons of image codes can be performed “closer” to the memory devices, e.g., at the memory controller coupled to memory devices.

公开(公告)号：US20190020581A1

公开(公告)日：2019-01-17

申请号：US15647676

申请日：2017-07-12

Applicant: MICRON TECHNOLOGY, INC.

Inventor： JEREMY CHRITZ ,  DAVID HULTON ,  JOHN SCHROETER ,  JOHN WATSON

IPC: H04L12/721

CPC classification number: H04L45/44 ,  H04L45/04 ,  H04L45/12 ,  H04L45/122 ,  H04L45/124 ,  H04L45/14 ,  H04L45/22

Abstract: A device comprising a plurality of antennas operable to transmit and receive communication packets via a plurality of communication protocols and an integrated circuit chip coupled to the plurality of antennas. The integrated circuit chip comprises a first and a second plurality of processing elements. The first plurality of processing elements operable to receive communication packets via a first one of a plurality of communication protocols and process an optimal route. The second plurality of processing elements communicatively coupled to the first plurality of processing elements and operable to determine the optimal route to transmit the communication packets from a source device to a destination device based, at least in part, on transmission characteristics associated with at least one of the source or destination devices.