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11.
公开(公告)号:US20150280118A1
公开(公告)日:2015-10-01
申请号:US14228104
申请日:2014-03-27
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Jong-Won Lee , Gianpaolo Spadini , Stephen W. Russell , Derchang Kau
CPC classification number: H01L27/2463 , G11C13/0004 , G11C13/0023 , G11C13/004 , G11C13/0069 , G11C13/0097 , H01L27/24 , H01L27/2427 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/1253 , H01L45/141 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/1675 , H01L45/1683
Abstract: Methods of forming memory cells comprising phase change and/or chalcogenide materials are disclosed. In one aspect, the method includes providing a lower line stack extending in a first direction, the lower line stack comprising a sacrificial line over a lower conductive line. The method further includes forming a chalcogenide line extending in the first direction by selectively removing the sacrificial material of the sacrificial line and replacing the sacrificial line with a chalcogenide material.
Abstract translation: 公开了形成包含相变和/或硫族化物材料的记忆单元的方法。 在一个方面,该方法包括提供沿第一方向延伸的下线叠层,下线叠层包括在下导电线上的牺牲线。 该方法还包括通过选择性地去除牺牲线的牺牲材料并用硫族化物材料代替牺牲线来形成沿第一方向延伸的硫属化物线。
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公开(公告)号:US11563055B2
公开(公告)日:2023-01-24
申请号:US16877166
申请日:2020-05-18
Applicant: Micron Technology, Inc.
Inventor: Jong Won Lee , Gianpaolo Spadini , Derchang Kau
Abstract: Subject matter disclosed herein relates to a memory device, and more particularly to a self-aligned cross-point phase change memory-switch array and methods of fabricating same.
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公开(公告)号:US10692930B2
公开(公告)日:2020-06-23
申请号:US15414144
申请日:2017-01-24
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Jong Won Lee , Gianpaolo Spadini , Derchang Kau
Abstract: Subject matter disclosed herein relates to a memory device, and more particularly to a self-aligned cross-point phase change memory-switch array and methods of fabricating same.
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公开(公告)号:US20180366196A1
公开(公告)日:2018-12-20
申请号:US16111746
申请日:2018-08-24
Applicant: Micron Technology, Inc.
Inventor: DerChang Kau , Gianpaolo Spadini
Abstract: Some embodiments include apparatuses and methods having a memory cell, first and second conductive lines configured to access the memory cell, and a switch configured to apply a signal to one of the first and second conductive lines. In at least one of such embodiments, the switch can include a phase change material. Other embodiments including additional apparatuses and methods are described.
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公开(公告)号:US09905296B2
公开(公告)日:2018-02-27
申请号:US15676560
申请日:2017-08-14
Applicant: Micron Technology, Inc.
Inventor: DerChang Kau , Gianpaolo Spadini
CPC classification number: G11C13/0069 , G11C13/0004 , G11C13/0023 , G11C13/0026 , G11C13/0028 , G11C13/004 , G11C13/0097 , G11C16/08 , G11C16/24 , H01L23/528 , H01L27/2427 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/144 , H01L2924/0002 , H01L2924/00
Abstract: Some embodiments include apparatuses and methods having a memory cell, first and second conductive lines configured to access the memory cell, and a switch configured to apply a signal to one of the first and second conductive lines. In at least one of such embodiments, the switch can include a phase change material. Other embodiments including additional apparatuses and methods are described.
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公开(公告)号:US20170263684A1
公开(公告)日:2017-09-14
申请号:US15481208
申请日:2017-04-06
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Jong-Won Lee , Gianpaolo Spadini , Stephen W. Russell , Derchang Kau
CPC classification number: H01L27/2463 , G11C13/0004 , G11C13/0023 , G11C13/004 , G11C13/0069 , G11C13/0097 , H01L27/24 , H01L27/2427 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/1253 , H01L45/141 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/1675 , H01L45/1683
Abstract: Methods of forming memory cells comprising phase change and/or chalcogenide materials are disclosed. In one aspect, the method includes providing a lower line stack extending in a first direction, the lower line stack comprising a sacrificial line over a lower conductive line. The method further includes forming a chalcogenide line extending in the first direction by selectively removing the sacrificial material of the sacrificial line and replacing the sacrificial line with a chalcogenide material.
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公开(公告)号:US20170162263A1
公开(公告)日:2017-06-08
申请号:US15437141
申请日:2017-02-20
Applicant: Micron Technology, Inc.
Inventor: DerChang Kau , Gianpaolo Spadini
IPC: G11C13/00
CPC classification number: G11C13/0069 , G11C13/0004 , G11C13/0023 , G11C13/0026 , G11C13/0028 , G11C13/004 , G11C13/0097 , G11C16/08 , G11C16/24 , H01L23/528 , H01L27/2427 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/144 , H01L2924/0002 , H01L2924/00
Abstract: Some embodiments include apparatuses and methods having a memory cell, first and second conductive lines configured to access the memory cell, and a switch configured to apply a signal to one of the first and second conductive lines. In at least one of such embodiments, the switch can include a phase change material. Other embodiments including additional apparatuses and methods are described.
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18.
公开(公告)号:US09590012B2
公开(公告)日:2017-03-07
申请号:US14320275
申请日:2014-06-30
Applicant: Micron Technology, Inc.
Inventor: Jong Won Lee , Gianpaolo Spadini , Derchang Kau
IPC: H01L27/108 , H01L27/24 , H01L45/00
CPC classification number: H01L27/2463 , H01L27/2427 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/144 , H01L45/1608 , H01L45/1675
Abstract: Subject matter disclosed herein relates to a memory device, and more particularly to a self-aligned cross-point phase change memory-switch array and methods of fabricating same.
Abstract translation: 本文公开的主题涉及存储器件,更具体地涉及自对准交叉点相变存储器开关阵列及其制造方法。
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公开(公告)号:US20160293254A1
公开(公告)日:2016-10-06
申请号:US15180909
申请日:2016-06-13
Applicant: Micron Technology, Inc.
Inventor: DerChang Kau , Gianpaolo Spadini
CPC classification number: G11C13/0069 , G11C13/0004 , G11C13/0023 , G11C13/0026 , G11C13/0028 , G11C13/004 , G11C13/0097 , G11C16/08 , G11C16/24 , H01L23/528 , H01L27/2427 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/144 , H01L2924/0002 , H01L2924/00
Abstract: Some embodiments include apparatuses and methods having a memory cell, first and second conductive lines configured to access the memory cell, and a switch configured to apply a signal to one of the first and second conductive lines. In at least one of such embodiments, the switch can include a phase change material. Other embodiments including additional apparatuses and methods are described.
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公开(公告)号:US20180182457A1
公开(公告)日:2018-06-28
申请号:US15905317
申请日:2018-02-26
Applicant: Micron Technology, Inc.
Inventor: DerChang Kau , Gianpaolo Spadini
IPC: G11C13/00
CPC classification number: G11C13/0069 , G11C13/0004 , G11C13/0023 , G11C13/0026 , G11C13/0028 , G11C13/004 , G11C13/0097 , G11C16/08 , G11C16/24 , H01L23/528 , H01L27/2427 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/144 , H01L2924/0002 , H01L2924/00
Abstract: Some embodiments include apparatuses and methods having a memory cell, first and second conductive lines configured to access the memory cell, and a switch configured to apply a signal to one of the first and second conductive lines. In at least one of such embodiments, the switch can include a phase change material. Other embodiments including additional apparatuses and methods are described.
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