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公开(公告)号：US20110260774A1
公开(公告)日：2011-10-27
申请号：US13095410
申请日：2011-04-27
IPC分类号： H03K17/687
CPC分类号： H03K17/102
摘要： Described are embodiments of stacked field effect transistor (FET) switch having a plurality of FET devices coupled in series to form an FET device stack. To prevent the FET device stack from being turned on during large signal conditions, a first decoupling path and a second decoupling path are provided for the first FET device and the last FET device in the FET device stack. Both decoupling paths are configured to pass a time-variant input signal during the open state. The first decoupling path may be coupled from the drain contact of the first FET device to the gate contact or the source contact. The second decoupling path may be coupled from the source contact of the last FET device to the gate contact or drain contact. The time-variant input signal bypasses the FET device stack through the first and second decoupling paths during the open state.
摘要翻译： 描述了具有串联耦合以形成FET器件堆叠的多个FET器件的堆叠场效应晶体管（FET）开关的实施例。 为了防止在大信号状态期间FET器件堆叠被导通，为FET器件堆叠中的第一FET器件和最后一个FET器件提供第一去耦路径和第二去耦路径。 两个去耦路径被配置为在打开状态期间传递时变输入信号。 第一去耦路径可以从第一FET器件的漏极触点耦合到栅极触点或源极触点。 第二去耦路径可以从最后的FET器件的源极接触耦合到栅极接触或漏极接触。 在打开状态期间，时变输入信号通过第一和第二去耦路径绕过FET器件堆叠。
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公开(公告)号：US10056895B2
公开(公告)日：2018-08-21
申请号：US13095410
申请日：2011-04-27
IPC分类号： H03K17/10 , H03K17/687 , H03K17/693
CPC分类号： H03K17/102
摘要： Described are embodiments of stacked field effect transistor (FET) switch having a plurality of FET devices coupled in series to form an FET device stack. To prevent the FET device stack from being turned on during large signal conditions, a first decoupling path and a second decoupling path are provided for the first FET device and the last FET device in the FET device stack. Both decoupling paths are configured to pass a time-variant input signal during the open state. The first decoupling path may be coupled from the drain contact of the first FET device to the gate contact or the source contact. The second decoupling path may be coupled from the source contact of the last FET device to the gate contact or drain contact. The time-variant input signal bypasses the FET device stack through the first and second decoupling paths during the open state.
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公开(公告)号：US09673802B2
公开(公告)日：2017-06-06
申请号：US13095302
申请日：2011-04-27
IPC分类号： H03K17/10
CPC分类号： H03K17/102
摘要： Described are embodiments of stacked field effect transistor (FET) switch having a plurality of FET devices coupled in series to form an FET device stack. To prevent the FET device stack from being turned on during large signal conditions, one or more decoupling paths are provided and are configured to pass the time-variant input signal during the open state of the FET device stack. The first decoupling path may include a capacitor, a transistor, or the like, that passes the time-variant input signal by, for example, presenting a low impedance to the time-variant input signal during the open state. The decoupling paths may be connected so that the time-variant input signal bypasses a portion of the FET device stack during the open state.
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14.发明授权Digital step attenuator utilizing thermometer encoded multi-bit attenuator stages 有权数字步进衰减器，采用温度计编码的多位衰减器级公开(公告)号：US09100046B2
公开(公告)日：2015-08-04
申请号：US13589037
申请日：2012-08-17
申请人： Marcus Granger-Jones
发明人： Marcus Granger-Jones
摘要： A digital step attenuator with thermometer encoded attenuator stages is disclosed. In one embodiment, Embodiments disclosed in the detailed description may include a digital step attenuator, programmable thermometer encoded attenuator stages, the digital step attenuator may include a cascade of programmable thermometer encoded attenuator stages. Each stage may be provided by a programmable impedance array including a plurality of impedances arranged in parallel. The impedance of each of the plurality of each stage may change monotonically by switchably inserting or removing one of the plurality of impedances in the arrays. The control circuit may govern the attenuation level of each of the thermometer encoded accumulator stages as a function of a thermometric codeword, which controls the switches in the arrays.
摘要翻译： 公开了一种具有温度计编码衰减器级的数字步进衰减器。 在一个实施例中，在详细描述中公开的实施例可以包括数字步进衰减器，可编程温度计编码的衰减器级，数字步进衰减器可以包括级联的可编程温度计编码衰减器级。 每个级可以由包括并联布置的多个阻抗的可编程阻抗阵列提供。 多个每个级中的每一个的阻抗可以通过可切换地插入或去除阵列中的多个阻抗中的一个来单调改变。 控制电路可以将温度计编码的累加器级中的每一个的衰减水平作为控制阵列中的开关的测温代码字的函数。
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公开(公告)号：US08970278B2
公开(公告)日：2015-03-03
申请号：US13095357
申请日：2011-04-27
CPC分类号： H03K17/102
摘要： Described are embodiments of stacked field effect transistor (FET) switch having a plurality of FET devices coupled in series to form an FET device stack. A control circuit provides biasing voltages to the gate, source, and drain contacts of each of the plurality of FET devices to switch the FET device stack to and from a closed state and an open state. In the open state, the gate contacts of each of the plurality of FET devices are biased by the control circuit at the second voltage. To prevent activation in the open state, the control circuit biases the drain contacts and source contacts of each of the plurality of FET devices at the first voltage. The first voltage is positive relative to a reference voltage, such as ground, while the second voltage is non-negative relative to the reference voltage but less than the first voltage.
摘要翻译： 描述了具有串联耦合以形成FET器件堆叠的多个FET器件的堆叠场效应晶体管（FET）开关的实施例。 控制电路向多个FET器件中的每一个FET器件的栅极，源极和漏极触点提供偏置电压，以将FET器件堆叠切换到闭合状态和断开状态。 在打开状态下，多个FET器件中的每一个的栅极触点被第二电压的控制电路偏置。 为了防止在打开状态下的激活，控制电路以第一电压偏置多个FET器件中的每一个的漏极触点和源极触点。 第一电压相对于参考电压（例如接地）为正，而第二电压相对于参考电压为非负，但小于第一电压。
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公开(公告)号：US20130241666A1
公开(公告)日：2013-09-19
申请号：US13606139
申请日：2012-09-07
申请人： Marcus Granger-Jones , Nadim Khlat
发明人： Marcus Granger-Jones , Nadim Khlat
IPC分类号： H01P1/10
CPC分类号： H01P1/15 , H01P1/10 , H04B1/006 , H04B1/1027 , H04B1/109 , H04B2001/1054 , H04B2001/1063
摘要： A band switch with a switchable notch for receive carrier aggregation is disclosed. The band switch has at least one input and an output with at least one series switch coupled between the at least one input and the output. The at least one series switch is adapted to selectively couple the input to the output in response to a first control signal. The band switch also includes at least one shunt switch coupled between the at least one input and a voltage node. The at least one shunt switch is adapted to selectively couple the at least one input to the voltage node in response to a second control signal. In addition, at least one notch filter is selectively coupled to the output in a shunt configuration, wherein the at least one notch filter is configured to attenuate signals within a stop band to attenuate harmonics and distortion.
摘要翻译： 公开了具有用于接收载波聚合的可切换陷波的带开关。 带开关具有至少一个输入和输出，其中至少一个串联开关耦合在至少一个输入和输出之间。 至少一个串联开关适于响应于第一控制信号选择性地将输入耦合到输出。 带开关还包括耦合在至少一个输入端和电压节点之间的至少一个并联开关。 所述至少一个并联开关适于响应于第二控制信号选择性地将所述至少一个输入耦合到所述电压节点。 此外，至少一个陷波滤波器在分流配置中选择性地耦合到输出，其中至少一个陷波滤波器被配置为衰减阻带内的信号以衰减谐波和失真。
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公开(公告)号：US20120094623A1
公开(公告)日：2012-04-19
申请号：US13171897
申请日：2011-06-29
申请人： Nadim Khlat , Marcus Granger-Jones
发明人： Nadim Khlat , Marcus Granger-Jones
IPC分类号： H04B1/18
CPC分类号： H04B1/18
摘要： An antenna tuner unit (ATU) that provides broadband tuning is disclosed. The disclosed ATU includes a radio frequency (RF) switch circuit having an N number of switch inputs, wherein N is a natural number equal to 2 or greater. An N number of reactance elements are coupled in series between an RF input and one of the N number of switch inputs. Taps between adjacent pairs of the N number of reactance elements, wherein each of the taps is coupled to a corresponding one of the N number of switch inputs. The ATU further includes a capacitive element for each of the taps, wherein each capacitive element is coupled between a corresponding one of the taps and a voltage node. In at least one embodiment, each of the capacitive elements is made up of a programmable capacitor array.
摘要翻译： 公开了提供宽带调谐的天线调谐器单元（ATU）。 所公开的ATU包括具有N个开关输入的射频（RF）开关电路，其中N是等于2或更大的自然数。 N个电抗元件在RF输入和N个开关输入中的一个之间串联耦合。 在N个电抗元件的相邻对之间的抽头，其中每个抽头耦合到N个开关输入中的对应的一个。 ATU还包括用于每个抽头的电容元件，其中每个电容元件耦合在相应的一个抽头和电压节点之间。 在至少一个实施例中，每个电容元件由可编程电容器阵列组成。
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公开(公告)号：US08120426B1
公开(公告)日：2012-02-21
申请号：US12820807
申请日：2010-06-22
申请人： Marcus Granger-Jones , Jim Connelly
发明人： Marcus Granger-Jones , Jim Connelly
IPC分类号： H03F3/45
CPC分类号： H03F1/0277 , H03F1/3205 , H03F3/189 , H03F3/211 , H03F3/245 , H03F3/45183 , H03F3/4565 , H03F3/72 , H03F2200/171 , H03F2200/294 , H03F2200/336 , H03F2200/405 , H03F2203/21136 , H03F2203/21142 , H03F2203/45418 , H03F2203/45434 , H03F2203/45594 , H03F2203/45686 , H03F2203/45702 , H03F2203/45726
摘要： A transconductor stage is a linearized class AB amplifier having embedded noise filtering that enables a biasing of an in-phase/quadrature (I/Q) modulator core with a low quiescent current. Linearization of the transconductor stage is increased by introducing a small amount of negative feedback into the transconductor stage via a feedback circuitry and an error amplifier. A dominant open loop pole in a path between the error amplifier and an output stage of the transconductor stage forms a dominant pole low-pass filter. A low-pass filter transfer function created when a loop including the feedback circuitry is closed attenuates noise introduced by baseband circuitry that supplies baseband signals to the transconductor stage. A master output stage biases a plurality of slave output stages that are in parallel with the master output stage. Each slave output stage is coupled to an individual modulator core such as a Gilbert cell mixer core.
摘要翻译： 跨导级是具有嵌入式噪声滤波的线性化AB类放大器，其能够以低静态电流偏置同相/正交（I / Q）调制器核。 通过经由反馈电路和误差放大器将少量的负反馈引入跨导级来增加跨导级的线性化。 误差放大器与跨导级级输出级之间的路径中的主要开环极点形成主极低通滤波器。 当包括反馈电路的环路闭合时产生的低通滤波器传递函数会衰减由基带电路引入的噪声，该基带电路将基带信号提供给跨导级。 主输出级偏置与主输出级并联的多个从输出级。 每个从输出级耦合到诸如吉尔伯特单元混频器核心的单独调制器核心。
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公开(公告)号：US07302011B1
公开(公告)日：2007-11-27
申请号：US10272389
申请日：2002-10-16
申请人： Marcus Granger-Jones
发明人： Marcus Granger-Jones
CPC分类号： H03B27/00 , G06F7/68 , H03B19/14 , H03K5/00006
摘要： The frequency doubler of the present invention operates to provide an in-phase signal and a quadrature signal, each having a frequency equal to twice the frequency of a reference signal. The in-phase and quadrature signals are based on signals that are 0 degrees, 45 degrees, 90 degrees, and 135 degrees out of phase with the reference signal. The in-phase signal is provided by multiplying the signals that are 0 degrees and 90 degrees out of phase with the reference signal, and the quadrature signal is provided by multiplying the signals that are 45 degrees and 135 degrees out of phase with the reference signal.
摘要翻译： 本发明的倍频器用于提供同相信号和正交信号，每个信号具有等于参考信号频率的两倍的频率。 同相和正交信号基于与参考信号0度，45度，90度和135度异相的信号。 通过将与参考信号相差0度和90度异相的信号相乘来提供同相信号，并且通过将与参考信号相差45度和135度异相的信号相乘来提供正交信号 。
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20.发明授权公开(公告)号：US07251298B1
公开(公告)日：2007-07-31
申请号：US10644231
申请日：2003-08-20
摘要： The present invention provides a receiver frontend that eliminates static and dynamic DC errors and has improved second order intermodulation distortion (IMD2) performance. The receiver frontend includes a first mixer that multiplies a received signal and a first local oscillator (LO) signal to produce an intermediate frequency (IF) signal. A second mixer multiplies the IF signal and a second LO signal to produce an output signal. A first divider circuit divides a reference signal from a reference oscillator by a first divisor N to produce the first LO signal, and a second divider circuit divides the reference signal by a second divisor M to produce the second LO signal. Preferably, the first and second divisors N and M are each integers greater than one (1), and the second divisor M is not an integer multiple of the first divisor N.
摘要翻译： 本发明提供一种消除静态和动态DC误差并具有改进的二阶互调失真（IMD2）性能的接收器前端。 接收器前端包括将接收信号和第一本地振荡器（LO）信号相乘以产生中频（IF）信号的第一混频器。 第二混频器将IF信号和第二LO信号相乘以产生输出信号。 第一除法器电路将来自参考振荡器的参考信号由第一除数N分频以产生第一LO信号，并且第二除法器电路将参考信号除以第二除数M以产生第二LO信号。 优选地，第一和第二因子N和M各自是大于1（1）的整数，并且第二因子M不是第一因子N的整数倍。
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