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公开(公告)号：US07251298B1
公开(公告)日：2007-07-31
申请号：US10644231
申请日：2003-08-20
摘要： The present invention provides a receiver frontend that eliminates static and dynamic DC errors and has improved second order intermodulation distortion (IMD2) performance. The receiver frontend includes a first mixer that multiplies a received signal and a first local oscillator (LO) signal to produce an intermediate frequency (IF) signal. A second mixer multiplies the IF signal and a second LO signal to produce an output signal. A first divider circuit divides a reference signal from a reference oscillator by a first divisor N to produce the first LO signal, and a second divider circuit divides the reference signal by a second divisor M to produce the second LO signal. Preferably, the first and second divisors N and M are each integers greater than one (1), and the second divisor M is not an integer multiple of the first divisor N.
摘要翻译： 本发明提供一种消除静态和动态DC误差并具有改进的二阶互调失真（IMD2）性能的接收器前端。 接收器前端包括将接收信号和第一本地振荡器（LO）信号相乘以产生中频（IF）信号的第一混频器。 第二混频器将IF信号和第二LO信号相乘以产生输出信号。 第一除法器电路将来自参考振荡器的参考信号由第一除数N分频以产生第一LO信号，并且第二除法器电路将参考信号除以第二除数M以产生第二LO信号。 优选地，第一和第二因子N和M各自是大于1（1）的整数，并且第二因子M不是第一因子N的整数倍。
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公开(公告)号：US08705654B1
公开(公告)日：2014-04-22
申请号：US12901109
申请日：2010-10-08
CPC分类号： H03F3/195 , H03F1/3247 , H03F1/3282 , H03F3/24 , H04L27/0002
摘要： The present disclosure relates to RF circuitry having delay locked loop (DLL) circuitry that may be used to measure amplitude modulation-to-phase modulation (AMPM) distortion of an RF power amplifier during factory calibration or during real time operation of the RF circuitry. During a calibration mode, the DLL circuitry may be calibrated using a reference clock signal. During a phase measurement mode, the DLL circuitry may use the reference clock signal, which is representative of an RF input signal to the RF power amplifier, and a feedback signal, which is representative of an RF output signal from the RF power amplifier, to measure a phase difference between the RF input signal and the RF output signal. By measuring the phase difference at different amplitudes of the RF output signal, the AMPM distortion of the RF power amplifier may be determined and used to correct for the AMPM distortion.
摘要翻译： 本公开涉及具有延迟锁定环（DLL）电路的RF电路，其可以用于在工厂校准期间或在RF电路的实时操作期间测量RF功率放大器的幅度调制 - 相位调制（AMPM）失真。 在校准模式期间，可以使用参考时钟信号来校准DLL电路。 在相位测量模式期间，DLL电路可以使用表示到RF功率放大器的RF输入信号的参考时钟信号，以及代表来自RF功率放大器的RF输出信号的反馈信号， 测量RF输入信号和RF输出信号之间的相位差。 通过测量RF输出信号的不同幅度的相位差，可以确定RF功率放大器的AMPM失真并用于校正AMPM失真。
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公开(公告)号：US08509351B1
公开(公告)日：2013-08-13
申请号：US12895223
申请日：2010-09-30
IPC分类号： H03C3/00
CPC分类号： H03C5/00 , H03C2200/0058
摘要： The present disclosure relates to multi-mode RF circuitry using a single IQ modulator topology that may support different communication standards, including enhanced data rates for global system for mobile communications evolution (EDGE) and EDGE evolution by dividing certain modulation functions between a frequency synthesizer and an IQ modulator. Specifically, during a standard modulation mode, which may be used to support many communications standards, the frequency synthesizer provides an un-modulated RF carrier signal to the IQ modulator, which either phase modulates or phase and amplitude modulates the un-modulated RF carrier signal to provide a standard modulated RF signal. During a small signal polar modulation mode, which may be used to support the EDGE and EDGE evolution protocols, the frequency synthesizer provides a phase-modulated RF carrier signal to the IQ modulator, which may or may not amplitude modulate the phase-modulated RF carrier signal to provide a small signal polar modulated RF signal.
摘要翻译： 本公开涉及使用可以支持不同通信标准的单个IQ调制器拓扑的多模式RF电路，包括用于移动通信演进（EDGE）的全球系统的增强的数据速率和通过在频率合成器和 一个IQ调制器。 具体地说，在可用于支持许多通信标准的标准调制模式中，频率合成器向IQ调制器提供未调制的RF载波信号，IQ调制器可以对未调制的RF载波信号进行相位调制或相位和幅度调制 以提供标准的调制RF信号。 在可以用于支持EDGE和EDGE演进协议的小信号极化调制模式中，频率合成器向IQ调制器提供相位调制的RF载波信号，IQ调制器可以或可以不对相位调制的RF载波进行幅度调制 信号提供小信号极调调制RF信号。
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公开(公告)号：US07962108B1
公开(公告)日：2011-06-14
申请号：US11392053
申请日：2006-03-29
IPC分类号： H04B1/04
CPC分类号： H04B1/0475 , H03F1/3241
摘要： A system and method for calibrating Amplitude Modulation to Phase Modulation (AM/PM) compensation circuitry in a mobile terminal operating according to a polar modulation scheme are provided. In general, during ramp-up for a transmit burst, measurements of a phase error between an input and output of power amplifier circuitry in the transmit chain are obtained. Using the phase error measurements, the AM/PM compensation circuitry is calibrated and used to provide AM/PM compensation for the same transmit burst. By calibrating the AM/PM compensation circuitry using the phase error measurements obtained during ramp-up, the AM/PM compensation circuitry is calibrated for the desired frequency band, sub-band, and power control level setting as well as for the current load conditions at the antenna and ambient temperature.
摘要翻译： 提供了一种用于校准根据极性调制方案操作的移动终端中的幅度调制到相位调制（AM / PM）补偿电路的系统和方法。 通常，在发射突发的斜坡上升期间，获得发射链中的功率放大器电路的输入和输出之间的相位误差的测量。 使用相位误差测量，AM / PM补偿电路被校准并用于为相同的发射脉冲串提供AM / PM补偿。 通过使用在斜坡上升期间获得的相位误差测量来校准AM / PM补偿电路，AM / PM补偿电路根据期望的频带，子频带和功率控制电平设置以及当前负载条件进行校准 在天线和环境温度。
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公开(公告)号：US09019011B2
公开(公告)日：2015-04-28
申请号：US13486012
申请日：2012-06-01
CPC分类号： H03F1/32 , H03F1/0222
摘要： A method for power amplifier (PA) calibration for an envelope tracking system of a wireless device is disclosed. The method involves measuring an output power of a PA that is a part under test (PUT) at a predetermined input power. Another step includes calculating a gain equal to the output power of the PA divided by the predetermined input power. A next step involves calculating a gain correction by subtracting the calculated gain from a desired gain. Other steps include determining an expected supply voltage for the PA at the desired gain using the gain correction applied to a nominal curve of gain versus PA supply voltage, and then storing the expected supply voltage for the PA versus input power in memory.
摘要翻译： 公开了一种用于无线设备的包络跟踪系统的功率放大器（PA）校准方法。 该方法包括以预定输入功率测量作为被测部件（PUT）的PA的输出功率。 另一步骤包括计算等于PA的输出功率除以预定输入功率的增益。 下一步涉及通过从期望的增益中减去所计算的增益来计算增益校正。 其他步骤包括使用增益校正应用于增益对PA电源电压的增益校正来确定期望增益的PA的预期电源电压，然后将PA的预期电源电压与输入功率存储在存储器中。
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公开(公告)号：US08774065B2
公开(公告)日：2014-07-08
申请号：US13460861
申请日：2012-05-01
IPC分类号： H04B7/00
CPC分类号： H04B1/0067 , H03F1/02 , H03F1/0227 , H03F3/24 , H03F3/68 , H03F3/72 , H03F2203/7209 , H03F2203/7221 , H04B2001/045 , H04L5/001
摘要： A front end radio architecture (FERA) with power management is disclosed. The FERA includes a first power amplifier (PA) block having a first-first PA and a first-second PA, and a second PA block having a second-first PA and a second-second PA. First and second modulated switchers are adapted to selectively supply power to the first-first PA and the second-first PA, and to supply power to the first-second PA and the second-second PA, respectively. The first and second modulated switchers have a modulation bandwidth of at least 20 MHz and are both suitable for envelope tracking modulation. A control system is adapted to selectively enable and disable the first-first PA, first-second PA, the second-first PA, and the second-second PA. First and second switches are responsive to control signals to route carriers and received signals between first and second antennas depending upon a selectable mode of operation such as intra-band or inter-band operation.
摘要翻译： 公开了具有电源管理的前端无线电架构（FERA）。 FERA包括具有第一第一PA和第一秒PA的第一功率放大器（PA）块和具有第二第一PA和第二秒PA的第二PA块。 第一和第二调制切换器适于选择性地向第一优先PA和第二第一PA供电，并分别向第一秒PA和第二秒PA供电。 第一和第二调制切换器具有至少20MHz的调制带宽，并且都适用于包络跟踪调制。 控制系统适于选择性地启用和禁用第一优先PA，第一秒PA，第二优先PA和第二秒PA。 第一和第二开关响应于控制信号以根据诸如带内或频带间操作的可选择的操作模式在第一和第二天线之间路由载波和接收信号。
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公开(公告)号：US07991071B2
公开(公告)日：2011-08-02
申请号：US10147569
申请日：2002-05-16
CPC分类号： H04L27/361
摘要： A transmitter includes a polar modulator that creates phase and amplitude signals which in turn drive a power amplifier. To compensate for AM to PM conversion of the amplitude signal into the amplified signal, a compensation signal is generated from the amplitude signal and combined with the phase signal such that when amplified, the compensation signal cancels the AM to PM conversion. The compensation signal may have an offset term, a linear term, a quadratic term, and a cubic term. A second embodiment comprises a technique by which AM to AM conversion may concurrently be addressed using a second compensation signal.
摘要翻译： 发射机包括极化调制器，其产生相位和幅度信号，其又驱动功率放大器。 为了补偿振幅信号的AM到PM转换为放大信号，从幅度信号产生补偿信号并与相位信号组合，使得当放大时，补偿信号取消AM到PM转换。 补偿信号可以具有偏移项，线性项，二次项和三次项。 第二实施例包括一种可以使用第二补偿信号并行地寻址AM到AM转换的技术。
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8.发明授权公开(公告)号：US07962109B1
公开(公告)日：2011-06-14
申请号：US11679201
申请日：2007-02-27
IPC分类号： H04B17/00
CPC分类号： H03G3/3047
摘要： A system and method for detecting and correcting over-current and/or over-voltage conditions in power amplifier circuitry in a transmit chain of a mobile terminal are provided. In general, over-current detection and correction circuitry combines a current detection signal indicative of a current provided to or drained by the power amplifier circuitry during ramp-up for a transmit burst and a substantially inverse current ramping profile to provide a first constant value. The first constant value is compared to a current threshold or limit value to determine whether an over-current condition exists. If an over-current condition exists, the over-current detection and correction circuitry operates to reduce the output power of the power amplifier circuitry during ramp-up for the transmit burst to correct for the over-current condition. In a similar manner, over-voltage detection circuitry operates to detect and correct over-voltage conditions during ramp-up for the transmit burst.
摘要翻译： 提供了一种用于在移动终端的发射链中的功率放大器电路中检测和校正过电流和/或过电压条件的系统和方法。 通常，过电流检测和校正电路组合指示在斜波上升期间功率放大器电路提供给发射脉冲串的电流的电流检测信号和用于发射脉冲串的基本上反向电流斜坡分布以提供第一恒定值。 将第一常数值与当前阈值或限制值进行比较，以确定是否存在过电流条件。 如果存在过电流状况，则过流检测和校正电路用于在发射突发的斜坡上降低功率放大器电路的输出功率，以校正过电流状况。 以类似的方式，过电压检测电路用于在发射突发的斜坡上升期间检测和校正过电压状况。
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9.发明授权System and method for transitioning from one PLL feedback source to another 有权从一个PLL反馈源转换到另一个PLL反馈源的系统和方法公开(公告)号：US07412215B1
公开(公告)日：2008-08-12
申请号：US11144119
申请日：2005-06-03
IPC分类号： H04B1/04
CPC分类号： H04B1/0475 , H03L7/081 , H03L7/087 , H03L7/16 , H03L2207/12
摘要： A system and method are provided for switching from one phase-locked loop feedback source to another in a radio frequency (RF) transmitter. The RF transmitter includes a phase-locked loop (PLL) that provides a phase-modulated RF input signal and power amplifier circuitry that amplifies the RF input signal to provide an RF output signal. The PLL includes switching circuitry that couples a feedback path of the PLL to an output of the PLL for open loop operation and couples the feedback path of the PLL to an output of the power amplifier circuitry for closed loop operation. Prior to switching the feedback path from the output of the PLL to the output of the power amplifier circuitry, time alignment circuitry operates to time-align feedback signals from the outputs of the PLL and the power amplifier circuitry such that switching from open loop operation to closed loop operation causes minimal phase disturbance.
摘要翻译： 提供了一种用于在射频（RF）发射机中从一个锁相环反馈源切换到另一个的系统和方法。 RF发射器包括提供相位调制RF输入信号的锁相环（PLL）和放大RF输入信号以提供RF输出信号的功率放大器电路。 PLL包括将PLL的反馈路径耦合到PLL的输出以用于开环操作的开关电路，并将PLL的反馈路径耦合到用于闭环操作的功率放大器电路的输出。 在将反馈路径从PLL的输出切换到功率放大器电路的输出之前，时间对准电路用于对来自PLL和功率放大器电路的输出的反馈信号进行时间对准，使得从开环操作切换到 闭环运行导致最小的相位扰动。
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公开(公告)号：US07313376B1
公开(公告)日：2007-12-25
申请号：US10987883
申请日：2004-11-12
IPC分类号： H04B1/06
CPC分类号： H04B1/30
摘要： A system and method for performing DC offset correction in a wireless communication receiver during “dead time” are provided. The receiver includes amplifier circuitry that amplifies a received radio frequency (RF) signal, downconversion circuitry that downconverts the received RF signal to provide a downconverted signal, digitization circuitry that digitizes the downconverted signal to provide a digital signal, and digital DC offset correction circuitry enabled during the dead time when there should be no DC content in the downconverted signal. In operation, the digital DC offset correction circuitry detects a DC offset of the digital signal and subtracts the DC offset from the digital signal.
摘要翻译： 提供了在“死区时间”期间在无线通信接收机中进行DC偏移校正的系统和方法。 接收器包括放大接收的射频（RF）信号的放大器电路，降频所接收的RF信号以提供下变频信号的下变频电路，使下变频信号数字化以提供数字信号的数字化电路和启用的数字DC偏移校正电路 在死区时间内，在下变频信号中不应有直流含量。 在操作中，数字DC偏移校正电路检测数字信号的DC偏移，并从数字信号中减去DC偏移。
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