公开(公告)号：US20090092147A1

公开(公告)日：2009-04-09

申请号：US12010762

申请日：2008-01-29

申请人： Hiroshi Arita ,  Yasuhiro Nakatsuka ,  Tasuwo Watanabe ,  Kei Ouchi ,  Yoshihiro Tanaka ,  Toshinobu Kanai ,  Masanobu Tanaka ,  Kenji Furuhashi ,  Tomoaki Aoki

发明人： Hiroshi Arita ,  Yasuhiro Nakatsuka ,  Tasuwo Watanabe ,  Kei Ouchi ,  Yoshihiro Tanaka ,  Toshinobu Kanai ,  Masanobu Tanaka ,  Kenji Furuhashi ,  Tomoaki Aoki

IPC分类号： H04L12/28

CPC分类号： H04L47/6255 ,  H04L12/44 ,  H04L47/10 ,  H04L47/2458 ,  H04L47/30 ,  H04L47/522 ,  H04L49/205 ,  H04L49/3018 ,  H04L49/351

摘要： A transmit packet generated by a CPU 1 is held in a buffer 100a (100b). From among packets received from Ethernet 820a (820b), a packet, a destination of which is a communication device 800, is held in the buffer 100a (100b). A packet which should be transmitted is transmitted from a transfer judging circuit 200 to Ethernet 820a or 820b through a MAC unit 300a or 300b. If a transfer judging circuit 200 judges a packet from the Ethernet 820a to be a packet, a destination of which is another communication device, with reference to a destination MAC address, this packet is transferred to the Ethernet 820b through MAC 300b. If a usage rate of a transferring FIFO buffer 130a (130b) exceeds a threshold value in the process of transmitting a packet held in a transmitting FIFO buffer 120a (130b) on a priority basis, the priority order of a transfer packet is made higher than that of a transmit packet so that the transfer packet is transferred to the Ethernet 820a or 820b in preference to the transmit packet. This prevents a transfer buffer means from overflowing.

摘要翻译： 由CPU1生成的发送包被保存在缓冲器100a（100b）中。 从从以太网820a（820b）接收的分组中，其目的地是通信设备800的分组被保存在缓冲器100a（100b）中。 应该发送的分组通过MAC单元300a或300b从传送判断电路200发送到以太网820a或820b。 如果传输判断电路200将来自以太网820a的分组判断为分组，则其目的地是另一个通信设备，参考目的地MAC地址，该分组通过MAC 300b被传送到以太网820b。 如果传送FIFO缓冲器130a（130b）的使用率在发送FIFO缓冲器120a（130b）中保持的分组的优先级的基础上超过阈值，则传送分组的优先级顺序高于 传输分组的传输分组优先于传送分组传送到以太网820a或820b。 这防止了传送缓冲器装置溢出。

公开(公告)号：US07483014B2

公开(公告)日：2009-01-27

申请号：US10514741

申请日：2003-05-16

申请人： Masanobu Tanaka ,  Ryota Odake ,  Kenichi Takahashi

发明人： Masanobu Tanaka ,  Ryota Odake ,  Kenichi Takahashi

IPC分类号： G09G3/38

CPC分类号： G02F1/163 ,  G02F1/1506 ,  G09G3/38 ,  G09G2310/061 ,  G09G2320/0233 ,  G09G2320/043

摘要： A method of driving a display apparatus with which unevenness of image is precluded and the time for display is shortened. A display apparatus for displaying an image by impressing a voltage on pixels by row electrodes and column electrodes disposed in a matrix, for example, a metal deposition type electrochemical display apparatus. A voltage not less than a threshold voltage Vth is selectively impressed on predetermined pixels by superposing an address pulse voltage Vadress-row for the row electrodes and an address voltage Vadress-col for the column electrodes on each other to thereby perform address driving, and a data sustaining pulse voltage Vsus is impressed on the row electrodes immediately after the address pulse voltage Vadress-row. The data sustaining pulse voltage Vsus satisfies the condition of the following formula: Vsus+Vadress-col

摘要翻译： 驱动图像的不均匀性被抑制的显示装置的驱动方法和缩短显示时间的方法。 一种显示装置，用于通过以排列在矩阵中的行电极和列电极的像素施加电压来显示图像，例如金属沉积型电化学显示装置。 通过将行电极的寻址脉冲电压Vadress-row和列电极的寻址电压Vadress-col叠加在一起，可以选择性地将预定像素上施加不小于阈值电压Vth的电压施加到预定像素上，从而执行地址驱动 在地址脉冲电压Vadress-row之后立即将数据维持脉冲电压Vsus施加在行电极上。 数据维持脉冲电压Vsus满足下式的条件：<？in-line-formula description =“In-line formula”end =“lead”？> Vsus + Vadress-col

公开(公告)号：US20060188700A1

公开(公告)日：2006-08-24

申请号：US10564968

申请日：2004-11-12

申请人： Shigeo Yukawa ,  Masanobu Tanaka

发明人： Shigeo Yukawa ,  Masanobu Tanaka

IPC分类号： B32B3/00

CPC分类号： G02B5/128 ,  G09F3/0292 ,  Y10T428/24802 ,  Y10T428/24876

摘要： The present invention is directed to providing a retroreflective sheet for security that is difficult to be counterfeited, cannot be reused if once released, includes a printed image that can be identified visually regardless of an object to be attached such as a colored glass and also can be identified visually clearly even in the night time, and is directed to providing a method for manufacturing the same. The retroreflective sheet for security of the present invention includes: a surface layer 1; a binder layer 2; high-refractive-index glass beads 3; a print resin layer 4; a focusing layer 5; a metal layer 6; and a pressure-sensitive adhesive layer 7 in this order, wherein the print resin layer 4 forms a mark, the high-refractive-index glass beads 3 are disposed in the binder layer 2, a position for disposing the high-refractive-index glass beads 3 does not coincide with a position of the print resin layer 4, when being observed from the surface layer 1 side in a thickness direction of the retroreflective sheet for security, and the print resin layer 4 is made of a composition containing a room temperature curing resin as a main component.

摘要翻译： 本发明旨在提供一种难以伪造的用于安全性的回射片，如果一旦释放则不能重复使用，包括可以被视觉识别的打印图像，而不管诸如彩色玻璃的被附着物体，并且还可以 即使在夜间也可以清晰地识别，并且旨在提供一种制造该方法的方法。 本发明的安全用逆反射片包括：表面层1; 粘合剂层2; 高折射率玻璃珠3; 印刷树脂层4; 聚焦层5; 金属层6; 和压敏粘合剂层7，其中印刷树脂层4形成标记，高折射率玻璃珠3设置在粘合剂层2中，用于设置高折射率玻璃的位置 从安全性的逆反射片的厚度方向的表面层1侧观察时，珠粒3与印刷树脂层4的位置不一致，印刷树脂层4由含有室温 固化树脂为主要成分。

公开(公告)号：US06534920B1

公开(公告)日：2003-03-18

申请号：US09887091

申请日：2001-06-25

申请人： Hideyo Uwabata ,  Masanobu Tanaka

发明人： Hideyo Uwabata ,  Masanobu Tanaka

IPC分类号： H01V2998

CPC分类号： H04N5/23203 ,  G09G1/04

摘要： An amplitude control circuit controls the amplitude of a correction signal periodically changing in a parabolic form at vertical scanning intervals based on the level of an amplitude control signal and applies an amplitude controlled output signal to an adder. The adder adds the amplitude controlled correction signal to the output signal of a low-pass filter and applies the resulting signal to a retrace scanning control circuit and a trace scanning control circuit. The retrace scanning control circuit and the trace scanning control circuit apply a gate pulse to horizontal output FETs.

摘要翻译： 幅度控制电路基于幅度控制信号的电平，以垂直扫描间隔控制以抛物线形式周期性变化的校正信号的幅度，并将幅度受控输出信号施加到加法器。 加法器将幅度控制校正信号加到低通滤波器的输出信号上，并将得到的信号施加到回扫扫描控制电路和跟踪扫描控制电路。 回扫扫描控制电路和跟踪扫描控制电路将栅极脉冲施加到水平输出FET。

公开(公告)号：US06411345B1

公开(公告)日：2002-06-25

申请号：US09410932

申请日：1999-10-04

申请人： Tomoya Yano ,  Masanobu Tanaka ,  Hidehiko Sekizawa ,  Takahiro Togawa

发明人： Tomoya Yano ,  Masanobu Tanaka ,  Hidehiko Sekizawa ,  Takahiro Togawa

IPC分类号： G02F1133

CPC分类号： H01J17/485 ,  G02F1/13334 ,  G09G3/3662 ,  H01J17/20

摘要： A plasma addressed liquid crystal display device has a plurality of plasma channels, each having discharge electrodes for plasma discharge, in an area divided by parallel partitions associated with reference electrodes. The discharge electrodes are formed by a pair of transparent electrodes having pre-set electrode widths and electrode intervals and a bus electrode of a material lower in the electrical resistance than the material of the transparent electrode and which is arranged in association with each transparent electrode. With the present plasma addressed liquid crystal display device, stable display can be obtained in an entire area of the viewing screen.

摘要翻译： 等离子体寻址液晶显示装置具有多个等离子体通道，每个等离子体通道具有用于等离子体放电的放电电极，在由与参考电极相关联的并行分隔开的区域中。 放电电极由具有预设电极宽度和电极间隔的一对透明电极和电阻低于透明电极的材料的总线电极形成，并且与每个透明电极相关联地布置。 利用本发明的等离子体寻址液晶显示装置，可以在观察屏幕的整个区域中获得稳定的显示。

公开(公告)号：US06222690B1

公开(公告)日：2001-04-24

申请号：US09113661

申请日：1998-07-10

申请人： Masanobu Tanaka ,  Tatsumaro Yamashita

发明人： Masanobu Tanaka ,  Tatsumaro Yamashita

IPC分类号： G11B500

CPC分类号： G11B15/54

摘要： An error component such as an eccentricity implicated in an encoder itself is superimposed upon a detected value from an FG due to an assembly error of assemblies themselves and in the manufacturing process. As a result, a speed could not be controlled with a high accuracy and wow and flatter could not be reduced. A tape speed (TSS) signal detected and corrected from the tape transport by FG and PG is inputted into a PLL loop within a data controller (TBC) of a reproducing system. A reproduced signal is converted by an A/D converter in response to a reference clock generated therein and this data is temporarily stored in an FIFO. When this data is reconverted by a D/A converter into an analog signal, if this data is sequentially converted at a timing of an absolute control clock of a quartz oscillator, then it is possible to eliminate the error component superimposed upon the head reproduced signal. Thus, from a theory standpoint, it becomes possible to erase the wow and flatter of the drive mechanism system from the head reproduced signal.

摘要翻译： 由于组装本身的组装误差和制造过程中，与编码器本身相关的诸如偏心之类的错误组件叠加在来自FG的检测值上。 结果，无法以高精度控制速度，并且不能减少平坦度。 通过FG和PG从磁带传输中检测和校正的磁带速度（TSS）信号被输入到再现系统的数据控制器（TBC）内的PLL环路中。 再现信号由A / D转换器响应于其中产生的参考时钟转换，并且该数据被临时存储在FIFO中。 当该数据被D / A转换器转换为模拟信号时，如果在石英振荡器的绝对控制时钟的定时将该数据顺序地转换，则可以消除叠加在磁头再生信号上的误差分量 。 因此，从理论的观点来看，可以从磁头重放信号中擦除驱动机构系统的笨拙和平坦。

公开(公告)号：US5963534A

公开(公告)日：1999-10-05

申请号：US935582

申请日：1997-09-23

申请人： Masanobu Tanaka ,  Tatsumaro Yamashita

发明人： Masanobu Tanaka ,  Tatsumaro Yamashita

IPC分类号： G11B17/04 ,  G11B17/043 ,  G11B17/08

CPC分类号： G11B17/043

摘要： A driving device in which when a cartridge is inserted with a correct orientation, a retainer protrusion of a drawing-in member engages a retainer recess of the cartridge, so that a sliding shaft of the drawing-in member slides along a guide surface to draw in the cartridge. When the cartridge is inserted with a reversed orientation, the drawing-in member is pushed sideways, so that the sliding shaft slides along a relief guide portion at the exterior side of the guide plate, causing the drawing-in member to be driven in the X1 direction. Since the drawing-in member is driven along the relief guide portion, locking of the mechanism does not occur. Accordingly, it is possible to prevent locking of a mechanism, which occurs when the cartridge is inserted with a wrong orientation, and the drawing-in member, which is not retained by the cartridge, is driven in the drawing-in direction, in a disk device in which a drawing-in member is used to draw in a cartridge of, for example, a mini-disk.

摘要翻译： 一种驱动装置，其中当盒以正确的方向插入时，拉入构件的保持器突起与卡盘的保持器凹部接合，使得拉入构件的滑动轴沿着引导表面滑动以绘制 在墨盒中。 当墨盒以相反的方向插入时，引入构件被侧向推动，使得滑动轴沿着引导板的外侧的释放引导部分滑动，使得引入构件被驱动在 X1方向。 由于引导构件沿着释放引导部被驱动，所以不会发生机构的锁定。 因此，可以防止当盒以错误的方向插入时发生的机构的锁定，并且未被盒保持的引入构件沿着拉出方向被驱动 磁盘装置，其中使用绘图构件来绘制例如小型盘的盒。

公开(公告)号：US09455408B2

公开(公告)日：2016-09-27

申请号：US13499631

申请日：2010-09-28

申请人： Masanobu Tanaka ,  Kenta Tanaka ,  Ken Sakakibara ,  Hideyuki Higashimura ,  Rui Ishikawa

发明人： Masanobu Tanaka ,  Kenta Tanaka ,  Ken Sakakibara ,  Hideyuki Higashimura ,  Rui Ishikawa

IPC分类号： H01L51/54 ,  C08G63/685 ,  C08G63/66 ,  H01L51/00 ,  C08G61/02 ,  C08G61/12 ,  H01L51/50

CPC分类号： H01L51/0039 ,  C08G61/02 ,  C08G61/12 ,  C08G61/122 ,  C08G2261/1424 ,  C08G2261/1426 ,  C08G2261/146 ,  C08G2261/312 ,  C08G2261/3142 ,  C08G2261/3162 ,  C08G2261/344 ,  C08G2261/91 ,  C08G2261/95 ,  H01L51/0038 ,  H01L51/0043 ,  H01L51/5056 ,  H01L51/5072 ,  Y02E10/549

摘要： Provided is a layered structure having a first electrode, a second electrode, a light emitting layer or a charge separation layer located between the first electrode and the second electrode, and a layer located between the light emitting layer or the charge separation layer and the first electrode and containing a polymer having a repeating unit containing one or more ionic groups selected from two specific groups and one or more specific polar groups. Also provided is a polymer having, as the repeating unit containing one or more ionic groups selected from two specific groups and one or more specific polar groups, one or more repeating units selected from four specific repeating units containing an aromatic group. The layered structure of the present invention provides an electroluminescent device capable of emitting light at a high luminance and a photoelectric conversion device having a high photoelectric conversion efficiency.

摘要翻译： 提供一种分层结构，其具有位于第一电极和第二电极之间的第一电极，第二电极，发光层或电荷分离层，以及位于发光层或电荷分离层之间的层和第一 并且含有具有重复单元的聚合物，所述重复单元含有选自两个特定基团和一个或多个特定极性基团的一个或多个离子基团。 还提供了作为含有选自两个特定基团和一个或多个特定极性基团的一个或多个离子基团的重复单元的聚合物，一个或多个选自含有芳族基团的四个特定重复单元的重复单元。 本发明的分层结构提供了能够以高亮度发光的电致发光器件和具有高光电转换效率的光电转换器件。

公开(公告)号：US08943963B2

公开(公告)日：2015-02-03

申请号：US13233581

申请日：2011-09-15

申请人： Masanobu Tanaka ,  Hirotsugu Ishihara ,  Toshiki Shimamura ,  Takahiro Kamei

发明人： Masanobu Tanaka ,  Hirotsugu Ishihara ,  Toshiki Shimamura ,  Takahiro Kamei

IPC分类号： B41F1/00 ,  B41F17/00

CPC分类号： H05K3/207 ,  H05K3/046 ,  H05K3/182 ,  H05K2203/0108 ,  H05K2203/0709 ,  H05K2203/074

摘要： A method for producing a metal thin film on a substrate includes: a step of applying an ink to a flat blanket; a first transfer step of bringing the first blanket and a letterpress having a predetermined pattern of projections into contact by a pressure compression while the flat blanked and the letterpress being disposed opposite each other, to selectively transfer a portion of the ink on the flat blanket corresponding to the projections to the letterpress; a second transfer step of bringing the flat blanket obtained after the first transfer step and the substrate into contact by pressure compression while the flat blanket and the substrate being disposed opposite each other, to transfer the ink remaining on the flat blanket to the substrate; and a step of subjecting the substrate obtained after the second transfer step to electroless plating to deposit a metal thin film on the substrate.

公开(公告)号：US08423661B2

公开(公告)日：2013-04-16

申请号：US12873893

申请日：2010-09-01

申请人： Hiroshi Arita ,  Yasuhiro Nakatsuka ,  Yasuwo Watanabe ,  Kei Ouchi ,  Yoshihiro Tanaka ,  Toshinobu Kanai ,  Masanobu Tanaka ,  Kenji Furuhashi ,  Tomoaki Aoki

发明人： Hiroshi Arita ,  Yasuhiro Nakatsuka ,  Yasuwo Watanabe ,  Kei Ouchi ,  Yoshihiro Tanaka ,  Toshinobu Kanai ,  Masanobu Tanaka ,  Kenji Furuhashi ,  Tomoaki Aoki

IPC分类号： G06F13/00

CPC分类号： H04L47/6255 ,  H04L12/44 ,  H04L47/10 ,  H04L47/2458 ,  H04L47/30 ,  H04L47/522 ,  H04L49/205 ,  H04L49/3018 ,  H04L49/351

摘要： A transmit packet generated by a CPU 1 is held in a buffer 100a (100b). From among packets received from Ethernet 820a (820b), a packet, a destination of which is a communication device 800, is held in the buffer 100a (100b). A packet which should be transmitted is transmitted from a transfer judging circuit 200 to Ethernet 820a or 820b through a MAC unit 300a or 300b. If a transfer judging circuit 200 judges a packet from the Ethernet 820a to be a packet, a destination of which is another communication device, with reference to a destination MAC address, this packet is transferred to the Ethernet 820b through MAC 300b. If a usage rate of a transferring FIFO buffer 130a (130b) exceeds a threshold value in the process of transmitting a packet held in a transmitting FIFO buffer 120a (130b) on a priority basis, the priority order of a transfer packet is made higher than that of a transmit packet so that the transfer packet is transferred to the Ethernet 820a or 820b in preference to the transmit packet. This prevents a transfer buffer means from overflowing.