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    Plasma display with improved reactivation characteristic, driving method for plasma display, wave generating circuit with reduced memory capacity, and planar matrix type display wave generating circuit
    11.
    发明授权
    Plasma display with improved reactivation characteristic, driving method for plasma display, wave generating circuit with reduced memory capacity, and planar matrix type display wave generating circuit 有权

    公开(公告)号：US06288714B1

    公开(公告)日：2001-09-11

    申请号：US09251919

    申请日：1999-02-17

    申请人： Akira Yamamoto ,  Masaya Tajima ,  Toshio Ueda ,  Hirohito Kuriyama ,  Katsuhiro Ishida

    发明人： Akira Yamamoto ,  Masaya Tajima ,  Toshio Ueda ,  Hirohito Kuriyama ,  Katsuhiro Ishida

    IPC分类号： G09G500

    摘要： A PDP not posing the problem that previous display data appears at the time of activation, and a wave generating circuit capable of generating a complex wave without the necessity of expanding a quantity of ROM data and of increasing a reading speed have been disclosed. A plasma display panel display comprising a plasma display panel that includes a plurality of cells to be selectively discharged to glow, a reset unit for bringing the plurality of cells to a given state, an addressing unit for setting the plurality of cells to states associated with display data, and a sustaining discharge unit for enabling the plurality of cells to glow according to the set states further comprises an operation halt factor detector for detecting the fact that a factor of halting the operation of the plasma display panel has occurred, and an initialization unit that when it is detected that the operation halt factor has occurred, initializes memory information in the plasma display panel. In a wave generating circuit for generating a wave on the basis of ROM data that is stored in a ROM and concerned with a wave and its generation, the ROM data is stored while being split into basic period data that changes at intervals of a basic period and long period data that changes at intervals of a long period data. The basic period data and long period data are read at intervals of associated periods and converted at intervals of associated periods.

    Wave generation circuit for reading ROM data and generating wave signals and flat matrix display apparatus using the same circuit
    13.
    发明授权
    Wave generation circuit for reading ROM data and generating wave signals and flat matrix display apparatus using the same circuit 失效
    用于读取ROM数据并产生波信号的波生成电路和使用相同电路的平面矩阵显示装置

    公开(公告)号：US6052105A

    公开(公告)日：2000-04-18

    申请号：US869227

    申请日：1997-06-04

    申请人： Akira Yamamoto ,  Masaya Tajima ,  Toshio Ueda ,  Hirohito Kuriyama ,  Katsuhiro Ishida ,  Yoshikazu Kanazawa

    发明人： Akira Yamamoto ,  Masaya Tajima ,  Toshio Ueda ,  Hirohito Kuriyama ,  Katsuhiro Ishida ,  Yoshikazu Kanazawa

    IPC分类号： G09F9/313 ,  G09G3/20 ,  G09G3/288 ,  G09G3/291 ,  G09G3/296 ,  G09G3/298 ,  G09G5/20 ,  H03B28/00 ,  G09G3/28 ,  G09C5/00 ,  G09G3/36

    CPC分类号： G09G3/2022 ,  G09G5/20 ,  G09G3/296

    摘要： A wave generation circuit is disclosed, in which a complex waveform can be generated without increasing the ROM data amount or increasing the reading rate. Waveform data relating to a waveform and the generation thereof are stored in a ROM for each cycle. An address signal for reading the waveform data sequentially is produced sequentially by an address generation circuit. The waveform data read out are sequentially reproduced into a waveform signal by a waveform data output circuit. In a wave generating circuit including the ROM and the address generation circuit, the waveform data includes the extension information instructing to extend and reproduce the waveform data for a particular cycle. An extension and control circuit included in the wave generation circuit decides on the presence or absence of the extension information from the read waveform data, and in the presence of the extension information, controls the waveform data output circuit to maintain the output of a corresponding waveform signal while at the same time controlling the address generation circuit to retard the generation of the address signal. The wave generation circuit can generate a single waveform data in an extended form according to the extension information when the same data continues for a plurality of cycles, thereby reducing the waveform data amount and the ROM capacity.

    摘要翻译： 公开了一种波生成电路，其中可以在不增加ROM数据量或增加读取速率的情况下生成复杂波形。 与波形有关的波形数据及其生成存储在每个周期的ROM中。 用地址产生电路依次产生用于顺序读取波形数据的地址信号。 读出的波形数据通过波形数据输出电路顺序再现成波形信号。 在包括ROM和地址生成电路的波形发生电路中，波形数据包括指示在特定周期中扩展和再现波形数据的扩展信息。 包括在波形生成电路中的扩展和控制电路根据读取的波形数据确定扩展信息的存在或不存在，并且在扩展信息的存在下，控制波形数据输出电路以维持相应波形的输出 同时控制地址生成电路来延迟地址信号的产生。 当相同的数据持续多个周期时，波形发生电路可以根据扩展信息以扩展形式生成单个波形数据，从而减少波形数据量和ROM容量。

    Display device and method for driving the same
    17.
    发明授权
    Display device and method for driving the same 失效
    显示装置及其驱动方法

    公开(公告)号：US5818419A

    公开(公告)日：1998-10-06

    申请号：US654261

    申请日：1996-05-28

    申请人： Masaya Tajima ,  Toshio Ueda ,  Hirohito Kuriyama ,  Katsuhiro Ishida ,  Akira Yamamoto

    发明人： Masaya Tajima ,  Toshio Ueda ,  Hirohito Kuriyama ,  Katsuhiro Ishida ,  Akira Yamamoto

    IPC分类号： G09G3/20 ,  G09G3/28 ,  G09G5/00 ,  G09G5/393 ,  G09G5/10

    CPC分类号： G09G3/2059 ,  G09G3/2033 ,  G09G5/005 ,  G09G2320/0247 ,  G09G2320/0266 ,  G09G2340/0428 ,  G09G3/2803 ,  G09G5/006 ,  G09G5/393

    摘要： A display device, for displaying a multiple-level gray scale picture through a frame having a plurality of sub-frames which are time-divided in accordance with weight value of gray scale for each sub-frame, comprises sub-frame selection circuit, being supplied with an vertical synchronization signal, for selecting the number of the sub-frames which can be displayed within the period for the single frame in accordance with the frequency of the vertical synchronization signal, and for providing a sub-frame selection signal corresponding to the number of the sub-frames; and display control circuit, operatively connected to the sub-frame selection circuit, for receiving the sub-frame selection signal and an input display data signal and for controlling said display of the multi-level gray scale picture in accordance with the selected number of the sub-frames. When the frequency of Vsync. is varied, the optimal number of the subframes are selected so that a number of sustain pulse, conversion table for pseudo-multiple-level gray scale conversion and for duplicated subframe conversion are properly selected.

    摘要翻译： 一种显示装置，用于通过具有根据每个子帧的灰度的权重值被时分的多个子帧的帧来显示多级灰度图像，包括子帧选择电路， 被提供有垂直同步信号，用于根据垂直同步信号的频率来选择可在单帧的周期内显示的子帧的数量，并且提供与该垂直同步信号对应的子帧选择信号 子帧数; 以及可操作地连接到子帧选择电路的显示控制电路，用于接收子帧选择信号和输入显示数据信号，并且用于根据所选择的数量来控制多级灰度图像的显示 子框架 当Vsync的频率。 选择最佳数量的子帧，从而适当地选择用于伪多级灰阶转换和复制子帧转换的维持脉冲，转换表的数量。

    Panel display in which the number of sustaining discharge pulses is adjusted according to the quantity of display data, and a driving method for the panel display
    19.
    发明授权
    Panel display in which the number of sustaining discharge pulses is adjusted according to the quantity of display data, and a driving method for the panel display 有权
    根据显示数据量调整持续放电脉冲数的面板显示，以及面板显示的驱动方法

    公开(公告)号：US6104362A

    公开(公告)日：2000-08-15

    申请号：US358117

    申请日：1999-07-21

    申请人： Hirohito Kuriyama ,  Masaya Tajima ,  Toshio Ueda ,  Katsuhiro Ishida ,  Akira Yamamoto

    发明人： Hirohito Kuriyama ,  Masaya Tajima ,  Toshio Ueda ,  Katsuhiro Ishida ,  Akira Yamamoto

    IPC分类号： G09G3/28 ,  G09G3/292 ,  G09G3/293 ,  G09G3/294 ,  G09G3/296 ,  G09G3/297 ,  G09G3/298

    CPC分类号： G09G3/297 ,  G09G3/2927 ,  G09G3/2932 ,  G09G3/2944 ,  G09G3/2946 ,  G09G3/296 ,  G09G3/298 ,  G09G2320/0223 ,  G09G2320/0233 ,  G09G2320/0626 ,  G09G2360/16

    摘要： A panel display has a display panel including a plurality of cells to be selectively discharged to an address driver for setting the plurality of cells to states represented by display data. The panel display also has a display glowing driver for enabling the plurality of cells to glow according to the set states. One frame during which one screen is displayed has a plurality of sub-frames and glowing periods within the sub-frames, during which the display cells are enabled to glow by the display glowing driver. The said sub-frames are weighted in order to achieve gray-scale display. The display panel also has a display load calculating circuit for calculating a display load to be imposed on a whole display surface during each sub-frame. In addition, a corrected period calculating circuit calculates a corrected period of a glowing period, during which the display cells are enabled to glow by the display glowing driver according to display loads to be imposed during each sub-frame. This is calculated by the display load calculating circuit so that brightness attained by the display cells during respective sub-frames will be maintained at a given ratio.

    摘要翻译： 面板显示器具有显示面板，其包括要选择性地放电到地址驱动器的多个单元，用于将多个单元设置为由显示数据表示的状态。 面板显示器还具有显示发光驱动器，用于使多个单元根据设定状态发光。 显示一个屏幕的一帧在子帧内具有多个子帧和发光周期，在该帧期间显示单元被显示发光驱动器发光。 对所述子帧进行加权以实现灰度显示。 显示面板还具有用于计算在每个子帧期间施加在整个显示表面上的显示负载的显示负载计算电路。 此外，校正周期计算电路根据在每个子帧期间施加的显示负载来计算发光周期的校正周期，在此期间显示单元能够被显示发光驱动器发光。 这由显示负载计算电路计算，使得在各个子帧期间由显示单元获得的亮度将被保持在给定的比例。