Abstract:
An image processing apparatus including first circuitry, second circuitry, third circuitry, and fourth circuitry is provided. The first circuitry determines a frame miss rate according to a current frame rate and a target frame rate of an image signal. The second circuitry decreases the target frame rate to the current frame rate when the frame miss rate is greater than a first threshold. The third circuitry increases the target frame rate to an upper-limit frame rate which is determined according to the frame rendering time or memory bandwidth capability, when the frame miss rate is less than a second threshold which is smaller than the first threshold. The fourth circuitry applies the decreased or increased target frame rate for an image to be displayed.
Abstract:
A method for controlling circuit modules within a chip is provided, wherein the circuit modules includes at least one processor and at least one network module, and the method includes: obtaining a plurality of temperature-related information of the circuit modules; and allocating power limits or throughput limits of the circuit modules according to the temperature-related information of the circuit modules, respectively.
Abstract:
A power budget allocation method includes: obtaining a system setting associated with a multi-core processor system, obtaining a target power budget, and checking, by a power management controller, at least one power management table according to the system setting and the target power budget to generate a power management output for the multi-core processor system. The system setting includes a core combination setting of the multi-core processor system, and further includes a frequency setting of each processor core selected by the core combination setting.
Abstract:
A frame rate control method is provided. The frame rate control method includes the following step: detecting a frame rate of an image signal generated by an image processing apparatus to generate a first detection result; detecting a system load on the image processing apparatus to generate a second detection result; and determining whether to provide a frame rate limit to limit the frame rate according to at least the first detection result and the second detection result.
Abstract:
A method for controlling circuit modules within a chip is provided, wherein the circuit modules includes at least one processor and at least one network module, and the method includes: obtaining a plurality of temperature-related information of the circuit modules; and allocating power limits or throughput limits of the circuit modules according to the temperature-related information of the circuit modules, respectively.
Abstract:
A thermal protection method includes: determining a thermal headroom based on a difference between a current temperature and a predetermined threshold temperature; determining a power budget based on the thermal headroom; and utilizing a processor-based system to employ a target computing power setting according to at least the power budget, wherein selection of the target computing power setting is constrained by the power budget to ensure that the target computing power setting does not make the current temperature exceed the predetermined threshold temperature when employed by the processor-based system.
Abstract:
The invention provides a thermal control method and a thermal control system. The thermal control method comprises: detecting a temperature variance of a component of the electronic device to generate a detecting result; and determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result. The thermal control system comprises: a detecting unit, for detecting a temperature variance of a component of the electronic device to generate a detecting result; and a determining unit, for determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result.
Abstract:
A deep learning accelerator (DLA) includes processing elements (PEs) grouped into PE groups to perform convolutional neural network (CNN) computations, by applying multi-dimensional weights on an input activation to produce an output activation. The DLA also includes a dispatcher which dispatches input data in the input activation and non-zero weights in the multi-dimensional weights to the processing elements according to a control mask. The DLA also includes a buffer memory which stores the control mask which specifies positions of zero weights in the multi-dimensional weights. The PE groups generate output data of respective output channels in the output activation, and share a same control mask specifying same positions of the zero weights.
Abstract:
A portable device is provided. The portable device includes: a display; a controller, a processor, a housing, and a touch rim. The controller and the processor are installed inside the housing. The touch rim is configured to detect a gesture performed on the touch rim to generate at least one touch detection signal. The controller is configured to receive at least one detection signal from the touch rim, and to transmit the touch detection signal to the processor. The processor analyzes the touch detection signal to determine the gesture performed on the touch rim, and performs an operation associated with the gesture.
Abstract:
Methods and apparatus are provided for chip aware thermal policies. The thermal performance mapping information is generated. The process obtains a set of process-dependent power data for each process corner of a semiconductor chip, profiles performance data, and selects an operating thermal policy based on the performance data. The thermal policy, based on the process-dependent power data is a mapping formula, or a combination of a mapping formula and a mapping table. The chip aware thermal control is based on process-dependent power data of process corners. The mapping information of process-dependent power data to a corresponding thermal policy is stored in a memory. A thermal policy is applied based on the stored mapping information and an obtained process corner information. The mapping information is applied every time the thermal policy is needed or at boot-up time.