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    METHODS AND SYSTEMS FOR NETWORK CONGESTION MANAGEMENT
    11.
    发明申请
    METHODS AND SYSTEMS FOR NETWORK CONGESTION MANAGEMENT 有权
    网络约束管理的方法与系统

    公开(公告)号：US20140269271A1

    公开(公告)日：2014-09-18

    申请号：US13803144

    申请日：2013-03-14

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Barak Gafni ,  Benny Koren ,  Freddy Gabbay ,  Zachy Hamamaty ,  Shachar Raindel

    IPC: H04L12/801

    CPC classification number: H04L47/35 ,  H04L47/32 ,  H04W28/0242 ,  H04W28/0284

    Abstract: Methods and systems are disclosed for network congestion management. The methods and systems receive a first packet complying with a first network protocol comprising a first congestion indicator representative of a presence or absence of network congestion and further comprising a first set of data associated with a second network protocol, and provide an indication of the presence or absence of network congestion generated based, at least in part, on the first congestion indicator. The methods and systems also receive a first packet complying with a first network protocol comprising a first set of data associated with a second network protocol, and output a second packet complying with the first network protocol comprising a first congestion indicator representative of a presence of network congestion.

    Abstract translation: 公开了用于网络拥塞管理的方法和系统。 所述方法和系统接收符合第一网络协议的第一分组，所述第一分组包括表示网络拥塞存在或不存在的第一拥塞指示符，并且还包括与第二网络协议相关联的第一组数据，并且提供存在 或者至少部分地基于第一拥塞指示生成网络拥塞。 所述方法和系统还接收符合第一网络协议的第一分组，所述第一网络协议包括与第二网络协议相关联的第一组数据，并且输出符合所述第一网络协议的第二分组，所述第二分组包括表示网络存在的第一拥塞指示符 拥塞。

    Access control in peer-to-peer transactions over a peripheral component bus
    14.
    发明授权
    Access control in peer-to-peer transactions over a peripheral component bus 有权

    公开(公告)号：US10303647B2

    公开(公告)日：2019-05-28

    申请号：US15202590

    申请日：2016-07-06

    Applicant: Mellanox Technologies Ltd.

    Inventor： Adi Menachem ,  Shachar Raindel

    IPC: G06F15/173 ,  G06F13/40 ,  G06F9/455 ,  G06F13/42

    Abstract: Computing apparatus includes a central processing unit (CPU), which is configured to run concurrently multiple virtual machines, including at least first and second virtual machines. A peripheral component bus is connected to communicate with the CPU. Multiple peripheral devices are connected to communicate via the bus with the CPU and with others of the peripheral devices, including at least first and second peripheral devices that are each respectively partitioned into at least first and second functional entities, which are respectively assigned to serve the at least first and second virtual machines. Access control logic is configured to forward peer-to-peer communications initiated by the functional entities between the peripheral devices over the bus while inhibiting access in the peer-to-peer communications between the functional entities that are assigned to different ones of the virtual machines.

    Sharing address translation between CPU and peripheral devices
    16.
    发明授权
    Sharing address translation between CPU and peripheral devices 有权
    共享CPU和外围设备之间的地址转换

    公开(公告)号：US09298642B2

    公开(公告)日：2016-03-29

    申请号：US13665946

    申请日：2012-11-01

    Applicant: MELLANOX TECHNOLOGIES LTD.

    Inventor： Michael Kagan ,  Noam Bloch ,  Liran Liss ,  Shachar Raindel

    IPC: G06F12/00 ,  G06F12/10

    CPC classification number: G06F12/1081

    Abstract: A method for memory access includes maintaining in a host memory, under control of a host operating system running on a central processing unit (CPU), respective address translation tables for multiple processes executed by the CPU. Upon receiving, in a peripheral device, a work item that is associated with a given process, having a respective address translation table in the host memory, and specifies a virtual memory address, the peripheral device translates the virtual memory address into a physical memory address by accessing the respective address translation table of the given process in the host memory. The work item is executed in the peripheral device by accessing data at the physical memory address in the host memory.

    Abstract translation: 一种用于存储器访问的方法包括在主机操作系统在中央处理单元（CPU）上运行的主机操作系统的控制下维护主机存储器，用于由CPU执行的多个进程的各自的地址转换表。 在外围设备中接收与给定进程相关联的工作项，在主机存储器中具有相应的地址转换表，并指定虚拟存储器地址时，外围设备将虚拟存储器地址转换为物理存储器地址 通过访问主机存储器中给定进程的相应地址转换表。 通过访问主机存储器中的物理存储器地址上的数据，在外围设备中执行工作项。

    PAGE RESOLUTION STATUS REPORTING
    17.
    发明申请
    PAGE RESOLUTION STATUS REPORTING 有权
    页面分辨率状态报告

    公开(公告)号：US20160077946A1

    公开(公告)日：2016-03-17

    申请号：US14846870

    申请日：2015-09-07

    Applicant: Mellanox Technologies Ltd.

    Inventor： Shlomo Raikin ,  Shachar Raindel ,  Noam Bloch ,  Liran Liss

    IPC: G06F11/30 ,  G06F13/38 ,  G06F12/08 ,  G06F13/16 ,  G11C7/10 ,  G06F12/10

    CPC classification number: G06F11/3065 ,  G06F12/0891 ,  G06F12/1009 ,  G06F12/109 ,  G06F13/1663 ,  G06F13/385 ,  G06F2212/653 ,  G06F2212/657

    Abstract: A method for data transfer includes receiving in a data transfer operation data to be written by a peripheral device to a specified virtual address in a random access memory (RAM) of a host computer. Upon receiving the data, it is detected that a page that contains the specified virtual address is marked as not present in a page table of the host computer. The peripheral device receives a notification that the page is not present and an estimate of a length of time that will be required to make the page available and selects a mode for handling of the data transfer operation depending upon the estimate.

    Abstract translation: 一种用于数据传送的方法包括：在主机计算机的随机存取存储器（RAM）中，在数据传送操作中接收要由外围设备写入的指定虚拟地址的数据。 在接收到数据时，检测到包含指定的虚拟地址的页面被标记为不存在于主计算机的页表中。 外围设备接收到页面不存在的通知以及使页面可用所需的时间长度的估计，并且根据估计选择用于处理数据传送操作的模式。

    NETWORK-ATTACHED MEMORY
    18.
    发明申请
    NETWORK-ATTACHED MEMORY 有权
    网络连接记忆

    公开(公告)号：US20150293881A1

    公开(公告)日：2015-10-15

    申请号：US14644400

    申请日：2015-03-11

    Applicant: Mellanox Technologies Ltd.

    Inventor： Shlomo Raikin ,  Shachar Raindel ,  Michael Kagan

    IPC: G06F15/167 ,  H04L29/08

    CPC classification number: H04L67/02 ,  G06F9/5016 ,  G06F12/023 ,  G06F12/0811 ,  G06F12/0813 ,  G06F12/0862 ,  G06F12/1072 ,  G06F12/123 ,  G06F15/17331 ,  G06F2212/1024 ,  G06F2212/163 ,  H04L67/10

    Abstract: A method for memory access is applied in a cluster of computers linked by a network. For a given computer, a respective physical memory range is defined including a local memory range within the local RAM of the given computer and a remote memory range allocated to the given compute within the local RAM of at least one other computer in the cluster, which is accessible via the network using the network interface controllers of the computers. When a memory operation is requested at a given address in the respective physical memory range, the operation is executed on the data in the local RAM of the given computer when the data at the given address are valid in the local memory range. Otherwise the data are fetched from the given address in the remote memory range to the local memory range before executing the operation on the data.

    Abstract translation: 用于存储器访问的方法被应用于由网络链接的计算机的集群中。 对于给定的计算机，定义相应的物理存储器范围，其包括给定计算机的本地RAM内的本地存储器范围和分配给集群中的至少另一台计算机的本地RAM内的给定计算的远程存储器范围， 可通过网络使用计算机的网络接口控制器访问。 当在相应物理存储器范围内的给定地址处请求存储器操作时，当给定地址的数据在本地存储器范围内有效时，对给定计算机的本地RAM中的数据执行操作。 否则，在对数据执行操作之前，将数据从远程存储器范围中的给定地址提取到本地存储器范围。

    LOW-LATENCY PROCESSING IN A NETWORK NODE
    19.
    发明申请
    LOW-LATENCY PROCESSING IN A NETWORK NODE 审中-公开
    网络节点中的低延迟处理

    公开(公告)号：US20150288624A1

    公开(公告)日：2015-10-08

    申请号：US14247255

    申请日：2014-04-08

    Applicant: Mellanox Technologies Ltd.

    Inventor： Shachar Raindel ,  Yaniv Saar ,  Haggai Eran ,  Yishai Israel Hadas ,  Ari Zigler

    IPC: H04L12/861 ,  H04L29/08

    CPC classification number: H04L49/90 ,  G06F13/382 ,  H04L49/9047

    Abstract: A method in a network node that includes a host and an accelerator, includes holding a work queue that stores work elements, a notifications queue that stores notifications of the work elements, and control indices for adding and removing the work elements and the notifications to and from the work queue and the notifications queue, respectively. The notifications queue resides on the accelerator, and at least some of the control indices reside on the host. Messages are exchanged between a network and the network node using the work queue, the notifications queue and the control indices.

    Abstract translation: 包括主机和加速器的网络节点中的方法包括保存存储工作元素的工作队列，存储工作元素的通知的通知队列，以及用于将工作元素和通知添加到和 分别从工作队列和通知队列。 通知队列驻留在加速器上，并且至少一些控制索引驻留在主机上。 使用工作队列，通知队列和控制索引，在网络和网络节点之间交换消息。

    Look-ahead handling of page faults in I/O operations
    20.
    发明授权
    Look-ahead handling of page faults in I/O operations 有权
    在I / O操作中提前处理页面错误

    公开(公告)号：US08914458B2

    公开(公告)日：2014-12-16

    申请号：US13628075

    申请日：2012-09-27

    Applicant: Mellanox Technologies Ltd.

    Inventor： Shachar Raindel ,  Haggai Eran ,  Liran Liss ,  Noam Bloch

    IPC: G06F15/167

    CPC classification number: G06F3/067 ,  G06F3/061 ,  G06F3/0656 ,  G06F3/0659

    Abstract: A method for data transfer includes receiving in an input/output (I/O) operation a first segment of data to be written to a specified virtual address in a host memory. Upon receiving the first segment of the data, it is detected that a first page that contains the specified virtual address is swapped out of the host memory. At least one second page of the host memory is identified, to which a second segment of the data is expected to be written. Responsively to detecting that the first page is swapped out and to identifying the at least one second page, at least the first and second pages are swapped into the host memory. After swapping at least the first and second pages into the host memory, the data are written to the first and second pages.

    Abstract translation: 一种用于数据传输的方法包括在输入/输出（I / O）操作中接收要写入主机存储器中的指定虚拟地址的第一数据段。 在接收到数据的第一段时，检测到包含指定虚拟地址的第一页被转换出主机存储器。 标识主机存储器的至少一个第二页，期望数据的第二段被写入到其上。 响应于检测到第一页面被换出并且识别至少一个第二页面，至少第一页面和第二页面被交换到主机存储器中。 至少将第一页和第二页交换到主机存储器之后，数据被写入第一页和第二页。

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