公开(公告)号：US09552986B2

公开(公告)日：2017-01-24

申请号：US14253649

申请日：2014-04-15

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Jiutao Li ,  Keith Hampton ,  Allen McTeer

IPC: H01L21/02 ,  C23C14/06 ,  C23C14/00 ,  C23C14/34 ,  C23C14/54

CPC classification number: H01L21/02631 ,  C23C14/0021 ,  C23C14/0623 ,  C23C14/3407 ,  C23C14/3492 ,  C23C14/548 ,  H01L21/02266 ,  Y10S428/938 ,  Y10T428/12896

Abstract: A method of sputter depositing silver selenide and controlling the stoichiometry and nodular defect formations of a sputter deposited silver-selenide film. The method includes depositing silver-selenide using a sputter deposition process at a pressure of about 0.3 mTorr to about 10 mTorr. In accordance with one aspect of the invention, an RF sputter deposition process may be used preferably at pressures of about 2 mTorr to about 3 mTorr. In accordance with another aspect of the invention, a pulse DC sputter deposition process may be used preferably at pressures of about 4 mTorr to about 5 mTorr.

Abstract translation: 溅射沉积硒化银并控制溅射沉积的硒化银膜的化学计量和结节缺陷形成的方法。 该方法包括在约0.3mTorr至约10mTorr的压力下使用溅射沉积工艺沉积硒化银。 根据本发明的一个方面，RF溅射沉积工艺可以优选地在约2mTorr至约3mTorr的压力下使用。 根据本发明的另一方面，脉冲DC溅射沉积工艺可优选地在约4mTorr至约5mTorr的压力下使用。

公开(公告)号：US09496495B2

公开(公告)日：2016-11-15

申请号：US15176609

申请日：2016-06-08

Applicant: Micron Technology, Inc.

Inventor： Martin Schubert ,  Shu Qin ,  Scott E. Sills ,  Durai Vishak Nirmal Ramaswamy ,  Allen McTeer ,  Yongjun Jeff Hu

IPC: H01L21/20 ,  H01L45/00

CPC classification number: H01L45/1608 ,  H01L45/08 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/141 ,  H01L45/146 ,  H01L45/16

Abstract: Some embodiments include a memory cell having a first electrode, and an intermediate material over and directly against the first electrode. The intermediate material includes stabilizing species corresponding to one or both of carbon and boron. The memory cell also has a switching material over and directly against the intermediate material, an ion reservoir material over the switching material, and a second electrode over the ion reservoir material. Some embodiments include methods of forming memory cells.

Abstract translation: 一些实施例包括具有第一电极的存储器单元，以及在第一电极之上并直接抵靠第一电极的中间材料。 中间材料包括对应于碳和硼之一或两者的稳定物质。 存储单元还具有超过并直接抵靠中间材料的开关材料，开关材料上方的离子储存器材料以及离子储存器材料上的第二电极。 一些实施例包括形成存储器单元的方法。

公开(公告)号：US09257646B2

公开(公告)日：2016-02-09

申请号：US14618936

申请日：2015-02-10

Applicant: Micron Technology, Inc.

Inventor： Martin Schubert ,  Shu Qin ,  Scott E. Sills ,  Durai Vishak Nirmal Ramaswamy ,  Allen McTeer ,  Yongjun Jeff Hu

IPC: H01L21/76 ,  H01L45/00

CPC classification number: H01L45/1608 ,  H01L45/08 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/141 ,  H01L45/146 ,  H01L45/16

Abstract: Some embodiments include a memory cell having a first electrode, and an intermediate material over and directly against the first electrode. The intermediate material includes stabilizing species corresponding to one or both of carbon and boron. The memory cell also has a switching material over and directly against the intermediate material, an ion reservoir material over the switching material, and a second electrode over the ion reservoir material. Some embodiments include methods of forming memory cells.

Abstract translation: 一些实施例包括具有第一电极的存储器单元，以及在第一电极之上并直接抵靠第一电极的中间材料。 中间材料包括对应于碳和硼之一或两者的稳定物质。 存储单元还具有超过并直接抵靠中间材料的开关材料，开关材料上方的离子储存器材料以及离子储存器材料上的第二电极。 一些实施例包括形成存储器单元的方法。

公开(公告)号：US09093367B2

公开(公告)日：2015-07-28

申请号：US13929590

申请日：2013-06-27

Applicant: Micron Technology, Inc.

Inventor： Lequn Jennifer Liu ,  Shu Qin ,  Allen McTeer ,  Yongjun Jeff Hu

IPC: H01L21/26 ,  H01L21/42 ,  H01L21/223 ,  H01L21/265 ,  H01L29/66

CPC classification number: H01L21/2236 ,  H01L21/26506 ,  H01L21/2652 ,  H01L21/26526 ,  H01L29/66575

Abstract: Some embodiments include methods of forming one or more doped regions in a semiconductor substrate. Plasma doping may be used to form a first dopant to a first depth within the substrate. The first dopant may then be impacted with a second dopant to knock the first dopant to a second depth within the substrate. In some embodiments the first dopant is p-type (such as boron) and the second dopant is neutral type (such as germanium). In some embodiments the second dopant is heavier than the first dopant.

Abstract translation: 一些实施例包括在半导体衬底中形成一个或多个掺杂区域的方法。 可以使用等离子体掺杂来形成第一掺杂剂到衬底内的第一深度。 然后可以用第二掺杂剂冲击第一掺杂剂以将第一掺杂剂敲入衬底内的第二深度。 在一些实施方案中，第一掺杂剂是p型（例如硼），第二掺杂剂是中性型（例如锗）。 在一些实施方案中，第二掺杂剂比第一掺杂剂重。

公开(公告)号：US08821697B2

公开(公告)日：2014-09-02

申请号：US13727121

申请日：2012-12-26

Applicant: Micron Technology, Inc.

Inventor： Jiutao Li ,  Allen McTeer

IPC: C23C14/34

CPC classification number: C23C14/3492 ,  C23C14/0623

Abstract: Method and apparatus for sputter depositing silver selenide and controlling defect formation in and on a sputter deposited silver selenide film are provided. A method of forming deposited silver selenide comprising both alpha and beta phases is further provided. The methods include depositing silver selenide using sputter powers of less than about 200 W, using sputter power densities of less than about 1 W/cm2, using sputter pressures of less than about 40 mTorr and preferably less than about 10 mTorr, using sputter gasses with molecular weight greater than that of neon, using cooling apparatus having a coolant flow rate at least greater than 2.5 gallons per minute and a coolant temperature less than about 25° C., using a magnetron sputtering system having a magnetron placed a sufficient distance from a silver selenide sputter target so as to maintain a sputter target temperature of less than about 350° C. and preferably below about 250° C. during sputter deposition, and heating the sputter deposition substrate to greater than about 30° C.

Abstract translation: 提供了用于溅射沉积硒化银并控制溅射沉积的硒化银膜上及其上的缺陷形成的方法和装置。 还提供了形成包含α相和β相的沉积的硒化银的方法。 所述方法包括使用小于约200W的溅射功率，使用小于约1W / cm 2的溅射功率密度，使用小于约40mTorr，优选小于约10mTorr的溅射压力沉积硒化银，使用溅射气体与 使用具有至少大于2.5加仑/分钟的冷却剂流速和小于约25℃的冷却剂温度的冷却装置，使用磁控管溅射系统，该磁控溅射系统具有放置在距离 硒化银溅射靶，以便在溅射沉积期间将溅射靶温度保持在小于约350℃，优选低于约250℃，并将溅射沉积衬底加热至大约30℃。

公开(公告)号：US08497194B2

公开(公告)日：2013-07-30

申请号：US13674674

申请日：2012-11-12

Applicant: Micron Technology, Inc.

Inventor： Lequn Jennifer Liu ,  Shu Qin ,  Allen McTeer ,  Yongjun Jeff Hu

IPC: H01L21/26 ,  H01L21/42

CPC classification number: H01L21/2236 ,  H01L21/26506 ,  H01L21/2652 ,  H01L21/26526 ,  H01L29/66575

Abstract: Some embodiments include methods of forming one or more doped regions in a semiconductor substrate. Plasma doping may be used to form a first dopant to a first depth within the substrate. The first dopant may then be impacted with a second dopant to knock the first dopant to a second depth within the substrate. In some embodiments the first dopant is p-type (such as boron) and the second dopant is neutral type (such as germanium). In some embodiments the second dopant is heavier than the first dopant.

公开(公告)号：US20130118894A1

公开(公告)日：2013-05-16

申请号：US13727121

申请日：2012-12-26

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Jiutao Li ,  Allen McTeer

IPC: C23C14/34

CPC classification number: C23C14/3492 ,  C23C14/0623

Abstract: Method and apparatus for sputter depositing silver selenide and controlling defect formation in and on a sputter deposited silver selenide film are provided. A method of forming deposited silver selenide comprising both alpha and beta phases is further provided. The methods include depositing silver selenide using sputter powers of less than about 200 W, using sputter power densities of less than about 1 W/cm2, using sputter pressures of less than about 40 mTorr and preferably less than about 10 mTorr, using sputter gasses with molecular weight greater than that of neon, using cooling apparatus having a coolant flow rate at least greater than 2.5 gallons per minute and a coolant temperature less than about 25° C., using a magnetron sputtering system having a magnetron placed a sufficient distance from a silver selenide sputter target so as to maintain a sputter target temperature of less than about 350° C. and preferably below about 250° C. during sputter deposition, and heating the sputter deposition substrate to greater than about 30° C.

Abstract translation: 提供了用于溅射沉积硒化银并控制溅射沉积的硒化银膜上及其上的缺陷形成的方法和装置。 还提供了形成包含α相和β相的沉积的硒化银的方法。 所述方法包括使用小于约200W的溅射功率，使用小于约1W / cm 2的溅射功率密度，使用小于约40mTorr，优选小于约10mTorr的溅射压力沉积硒化银，使用溅射气体与 使用具有至少大于2.5加仑/分钟的冷却剂流速和小于约25℃的冷却剂温度的冷却装置，使用磁控溅射系统，该磁控溅射系统具有放置在距离 硒化银溅射靶，以便在溅射沉积期间将溅射靶温度保持在小于约350℃，优选低于约250℃，并将溅射沉积衬底加热至大约30℃。

公开(公告)号：US20200083238A1

公开(公告)日：2020-03-12

申请号：US16684515

申请日：2019-11-14

Applicant: Micron Technology, Inc.

Inventor： Yongjun Jeff Hu ,  Allen McTeer

IPC: H01L27/11524 ,  H01L27/11582 ,  H01L27/1157 ,  H01L21/322 ,  H01L21/02

Abstract: Some embodiments include an integrated structure having semiconductor material within a region between two parallel surfaces. The semiconductor material has grain boundaries parallel to the parallel surfaces. At least one circuit component utilizes a region of the semiconductor material in a gated device. The semiconductor material has little if any metal therein so that the gated device has Ion/Ioff characteristics similar to if the semiconductor material had no metal therein. Some embodiments include a method in which semiconductor material is provided between a pair of parallel surfaces, and in which the parallel surfaces and semiconductor material extend between a first end and a second end. Metal is formed adjacent the first end, and gettering material is formed adjacent the second end. Thermal processing induces crystallization of the semiconductor material and drives the metal along the semiconductor material and into the gettering material. The gettering material is then removed.

公开(公告)号：US10325917B2

公开(公告)日：2019-06-18

申请号：US15686107

申请日：2017-08-24

Applicant: Micron Technology, Inc.

Inventor： Yongjun Jeff Hu ,  Allen McTeer

IPC: H01L27/11524 ,  H01L21/02 ,  H01L21/322 ,  H01L27/1157 ,  H01L27/11582

Abstract: Some embodiments include an integrated structure having semiconductor material within a region between two parallel surfaces. The semiconductor material has grain boundaries parallel to the parallel surfaces. At least one circuit component utilizes a region of the semiconductor material in a gated device. The semiconductor material has little if any metal therein so that the gated device has Ion/Ioff characteristics similar to if the semiconductor material had no metal therein. Some embodiments include a method in which semiconductor material is provided between a pair of parallel surfaces, and in which the parallel surfaces and semiconductor material extend between a first end and a second end. Metal is formed adjacent the first end, and gettering material is formed adjacent the second end. Thermal processing induces crystallization of the semiconductor material and drives the metal along the semiconductor material and into the gettering material. The gettering material is then removed.

公开(公告)号：US09385317B2

公开(公告)日：2016-07-05

申请号：US14884035

申请日：2015-10-15

Applicant: Micron Technology, Inc.

Inventor： Martin Schubert ,  Shu Qin ,  Scott E. Sills ,  Durai Vishak Nirmal Ramaswamy ,  Allen McTeer ,  Yongjun Jeff Hu

IPC: H01L29/02 ,  H01L45/00

CPC classification number: H01L45/1608 ,  H01L45/08 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/141 ,  H01L45/146 ,  H01L45/16

Abstract: Some embodiments include a memory cell having a first electrode, and an intermediate material over and directly against the first electrode. The intermediate material includes stabilizing species corresponding to one or both of carbon and boron. The memory cell also has a switching material over and directly against the intermediate material, an ion reservoir material over the switching material, and a second electrode over the ion reservoir material. Some embodiments include methods of forming memory cells.