Abstract:
An elastic wave device includes a piezoelectric substrate, an IDT electrode including a first electrode layer which is provided on the piezoelectric substrate and contains Pt as a main component and a second electrode layer which is laminated on the first electrode layer and contains Cu as a main component, and a dielectric film that is provided on the piezoelectric substrate and covers the IDT electrode. The piezoelectric substrate is made of lithium niobate. The dielectric film is made of silicon oxide. The elastic wave device uses Rayleigh waves propagating along the piezoelectric substrate.
Abstract:
A semiconductor device includes a semiconductor substrate; at least one transistor located on the semiconductor substrate and including a plurality of semiconductor layers; an electrode provided for the transistor; an organic insulating film having an opening in a region overlapping the transistor and the electrode in plan view in a first direction perpendicular to the semiconductor substrate; and a bump located over the at least one transistor in plan view in the first direction and electrically connected to the electrode through the opening of the organic insulating film. The width of the bump in a second direction parallel to the semiconductor substrate is smaller than the width of the opening of the organic insulating film in the second direction.
Abstract:
A semiconductor device includes a semiconductor substrate, at least one transistor on the semiconductor substrate and including semiconductor layers, a wiring on the transistor, a first insulating film including a first opening in a region overlapping the transistor and the wiring in plan view in a first direction perpendicular to the semiconductor substrate, a first redistribution layer on the first insulating film, overlapping the at least one transistor in the first direction in plan view, and electrically connected to the wiring via the first opening, a second insulating film covering the first redistribution layer and the first insulating film and provided with a second opening in a region overlapping at least a part of the first redistribution layer in the first direction in plan view, and a bump electrically connected to the first redistribution layer via the second opening.
Abstract:
A first layer conductor film is connected to an operation electrode through an opening in a first layer interlayer insulating film. An opening in a second layer interlayer insulating film is encompassed by the first layer conductor film in plan view. A second layer conductor film is connected to the first layer conductor film through the opening in a second layer interlayer insulating film. The average, along a first direction, of distances in a second direction, which is perpendicular to the first direction, from the opening in the first layer interlayer insulating film to the side surface of the opening in the second layer interlayer insulating film is greater than or equal to a distance in a height direction from an upper opening plane of the opening in the first layer interlayer insulating film to a lower opening plane of the opening in the second layer interlayer insulating film.
Abstract:
In an elastic wave device, an IDT electrode is provided on a piezoelectric substrate and a first silicon oxide film covers the IDT electrode. A high-acoustic-velocity dielectric film covers the first silicon oxide film. A second silicon oxide film is provided on the high-acoustic-velocity dielectric film. The piezoelectric substrate is made of lithium niobate. The high-acoustic-velocity dielectric film propagates longitudinal waves at an acoustic velocity higher than an acoustic velocity of longitudinal waves propagating through the first silicon oxide film. The high-acoustic-velocity dielectric film is provided at a distance of about (t1+t2)×0.42 or less from a first main surface of the piezoelectric substrate in a thickness direction of the piezoelectric substrate.
Abstract:
A manufacturing method for a boundary acoustic wave device is capable of certainly providing the boundary acoustic wave device with desired target frequency characteristics. The manufacturing method for the boundary acoustic wave device includes a process for preparing a laminated body that includes a first medium, a second medium laminated on the first medium, and an IDT electrode that is disposed at an interface between the first and second media, and a process for implanting ions from an outer portion of the second medium and adjusting a frequency.
Abstract:
A first chip includes a first insulating layer, a first device layer laminated on the first insulating layer, a first multilayer wiring layer laminated on the first device layer, and a first anchor. A high-frequency circuit is in the first chip. A second chip includes a substrate, a second multilayer wiring layer on the substrate, and a second anchor. A control circuit that controls the high-frequency circuit is in the second chip. The first anchor is embedded in the first device layer and the first insulating layer, and exposed from a surface of the first insulating layer. The second anchor is embedded in the second multilayer wiring layer, and exposed from a surface of the second multilayer wiring layer. The first and second anchors are formed from an identical metal material.
Abstract:
A semiconductor device has a semiconductor substrate, at least one first transistor that has a mesa structure including one or more semiconductor layers, a first bump that overlaps the first transistor and extends in a first direction, and a second bump, in which the mesa structure has a first end portion on one end side in a second direction and a second end portion on the other end side in the second direction. The opening has a first opening end portion and a second opening end portion that are adjacent in the second direction. In plan view, the first opening end portion is closer to the second bump than the second opening end portion and the first end portion and the second end portion of the mesa structure are disposed between the first opening end portion and the second opening end portion.
Abstract:
A semiconductor device includes a substrate having an upper surface on which are arranged first transistors each including a mesa structure formed of a semiconductor. A first bump having a shape elongated in one direction in plan view and connected to the first transistors is arranged at a position overlapping the first transistors in plan view. A second bump has a space with respect to the first bump in a direction orthogonal to a longitudinal direction of the first bump. A first metal pattern is arranged between the first and second bumps in plan view. When the upper surface of the substrate is taken as a height reference, a center of the first metal pattern in a thickness direction has a height higher than an upper surface of the mesa structure included in each of the first transistors and lower than a lower surface of the first bump.
Abstract:
A mesa portion is formed on a substrate. An insulating film including an organic layer is disposed on the mesa portion. A conductor film is disposed on the insulating film. A cavity provided in the organic layer has side surfaces extending in a first direction. A shorter distance out of distances in a second direction perpendicular to the first direction from the mesa portion to the side surfaces of the cavity in plan view is defined as a first distance. A shorter distance out of distances in the first direction from the mesa portion to side surfaces of the cavity in plan view is defined as a second distance. A height of a first step of the mesa portion is defined as a first height. At least one of the first distance and the second distance is greater than or equal to the first height.