公开(公告)号：US20220029004A1

公开(公告)日：2022-01-27

申请号：US17495588

申请日：2021-10-06

申请人： Murata Manufacturing Co., Ltd.

发明人： Isao OBU ,  Yasunari UMEMOTO ,  Masahiro SHIBATA ,  Shigeki KOYA ,  Masao KONDO ,  Takayuki TSUTSUI

IPC分类号： H01L29/737 ,  H01L29/08 ,  H01L29/10 ,  H01L29/417 ,  H01L29/423 ,  H01L21/306 ,  H01L21/02 ,  H01L21/285 ,  H01L21/311 ,  H01L21/308 ,  H01L29/66 ,  H03F3/213 ,  H03F3/195 ,  H01L29/205 ,  H03F3/21 ,  H03F1/56 ,  H03F3/24 ,  H01L23/00

摘要： A bipolar transistor includes a collector layer, a base layer, and an emitter layer that are formed in this order on a compound semiconductor substrate. The emitter layer is disposed inside an edge of the base layer in plan view. A base electrode is disposed on partial regions of the emitter layer and the base layer so as to extend from an inside of the emitter layer to an outside of the base layer in plan view. An insulating film is disposed between the base electrode and a portion of the base layer, with the portion not overlapping the emitter layer. An alloy layer extends from the base electrode through the emitter layer in a thickness direction and reaches the base layer. The alloy layer contains at least one element constituting the base electrode and elements constituting the emitter layer and the base layer.

公开(公告)号：US20210035922A1

公开(公告)日：2021-02-04

申请号：US16943243

申请日：2020-07-30

申请人： Murata Manufacturing Co., Ltd.

发明人： Hiroaki TOKUYA ,  Masahiro SHIBATA ,  Akihiko OZAKI ,  Satoshi GOTO ,  Fumio HARIMA ,  Atsushi KUROKAWA

IPC分类号： H01L23/00 ,  H01L29/737 ,  H01L27/082 ,  H01L23/498 ,  H01L23/66

摘要： At least one unit transistor is arranged over a substrate. A first wiring as a path of current that flows to each unit transistor is arranged over the at least one unit transistor. An inorganic insulation film is arranged over the first wiring. At least one first opening overlapping a partial region of the first wiring in a plan view is provided in the inorganic insulation film. An organic insulation film is arranged over the inorganic insulation film. A second wiring coupled to the first wiring through the first opening is arranged over the organic insulation film and the inorganic insulation film. In a plan view, a region in which the organic insulation film is not arranged is provided outside a region in which the first wiring is arranged. The second wiring is in contact with the inorganic insulation film outside the region in which the first wiring is arranged.

公开(公告)号：US20190109066A1

公开(公告)日：2019-04-11

申请号：US16153310

申请日：2018-10-05

申请人： Murata Manufacturing Co., Ltd.

发明人： Masao KONDO ,  Masahiro SHIBATA

IPC分类号： H01L23/367 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/737 ,  H01L29/417 ,  H01L23/498 ,  H01L23/00 ,  H03F3/21 ,  H03F1/30

摘要： A power amplifier module includes a substrate including, in an upper surface of the substrate, an active region and an element isolation region. The power amplifier module further includes a collector layer, a base layer, and an emitter layer that are stacked on the active region; an interlayer insulating film that covers the collector layer, the base layer, and the emitter layer; a pad that is thermally coupled to the element isolation region; and an emitter bump that is disposed on the interlayer insulating film, electrically connected to the emitter layer through a via hole provided in the interlayer insulating film, and electrically connected to the pad. In plan view, the emitter bump partially overlaps an emitter region which is a region of the emitter layer and through which an emitter current flows.

公开(公告)号：US20210043535A1

公开(公告)日：2021-02-11

申请号：US17081833

申请日：2020-10-27

申请人： Murata Manufacturing Co., Ltd.

发明人： Masao KONDO ,  Masahiro SHIBATA

IPC分类号： H01L23/367 ,  H03F3/195 ,  H01L23/498 ,  H01L23/00 ,  H01L29/06 ,  H01L29/417 ,  H01L29/737 ,  H03F3/213 ,  H03F3/21 ,  H03F1/30

摘要： A power amplifier module includes a substrate including, in an upper surface of the substrate, an active region and an element isolation region. The power amplifier module further includes a collector layer, a base layer, and an emitter layer that are stacked on the active region; an interlayer insulating film that covers the collector layer, the base layer, and the emitter layer; a pad that is thermally coupled to the element isolation region; and an emitter bump that is disposed on the interlayer insulating film, electrically connected to the emitter layer through a via hole provided in the interlayer insulating film, and electrically connected to the pad. In plan view, the emitter bump partially overlaps an emitter region which is a region of the emitter layer and through which an emitter current flows.

公开(公告)号：US20210391429A1

公开(公告)日：2021-12-16

申请号：US17348811

申请日：2021-06-16

申请人： Murata Manufacturing Co., Ltd.

发明人： Atsushi KUROKAWA ,  Masahiro SHIBATA ,  Hiroaki TOKUYA ,  Mari SAJI

IPC分类号： H01L29/417 ,  H01L29/73 ,  H01L29/08

摘要： A mesa portion is formed on a substrate. An insulating film including an organic layer is disposed on the mesa portion. A conductor film is disposed on the insulating film. A cavity provided in the organic layer has side surfaces extending in a first direction. A shorter distance out of distances in a second direction perpendicular to the first direction from the mesa portion to the side surfaces of the cavity in plan view is defined as a first distance. A shorter distance out of distances in the first direction from the mesa portion to side surfaces of the cavity in plan view is defined as a second distance. A height of a first step of the mesa portion is defined as a first height. At least one of the first distance and the second distance is greater than or equal to the first height.

公开(公告)号：US20210126591A1

公开(公告)日：2021-04-29

申请号：US17143940

申请日：2021-01-07

申请人： Murata Manufacturing Co., Ltd.

发明人： Isao OBU ,  Yasunari UMEMOTO ,  Masahiro SHIBATA ,  Kenichi NAGURA

IPC分类号： H03F1/52 ,  H01L23/00 ,  H01L29/04 ,  H03F3/213 ,  H01L29/737 ,  H01L27/02 ,  H01L27/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/205 ,  H01L29/06 ,  H01L21/265 ,  H01L29/417 ,  H01L29/423 ,  H01L23/48 ,  H01L29/861 ,  H01L21/768 ,  H03F3/195 ,  H01L21/02 ,  H01L29/36 ,  H01L29/207 ,  H01L29/45 ,  H01L21/285 ,  H01L21/3213 ,  H01L21/027 ,  H01L29/66 ,  H01L21/306 ,  H01L21/311 ,  H03F1/56

摘要： A circuit element is formed on a substrate made of a compound semiconductor. A bonding pad is disposed on the circuit element so as to at least partially overlap the circuit element. The bonding pad includes a first metal film and a second metal film formed on the first metal film. A metal material of the second metal film has a higher Young's modulus than a metal material of the first metal film.

公开(公告)号：US20200027805A1

公开(公告)日：2020-01-23

申请号：US16588030

申请日：2019-09-30

申请人： Murata Manufacturing Co., Ltd.

发明人： Isao OBU ,  Yasunari UMEMOTO ,  Masahiro SHIBATA

IPC分类号： H01L23/31 ,  H01L23/495 ,  H01L23/00 ,  H01L21/67 ,  H01L21/56 ,  H01L21/52 ,  H01L21/683 ,  H01L21/768 ,  H01L23/48

摘要： A semiconductor chip includes a single-crystal substrate and a metal electrode on the bottom surface of the substrate. The metal electrode has a region in which a first metal is exposed and a region in which a second metal is exposed, the second metal having a standard electrode potential different from that of the first metal.

公开(公告)号：US20190326191A1

公开(公告)日：2019-10-24

申请号：US16374674

申请日：2019-04-03

申请人： Murata Manufacturing Co., Ltd.

发明人： Masao KONDO ,  Isao OBU ,  Yasunari UMEMOTO ,  Yasuhisa YAMAMOTO ,  Masahiro SHIBATA ,  Takayuki TSUTSUI

IPC分类号： H01L23/367 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L23/48 ,  H03F1/30

摘要： A semiconductor chip includes an active element on a first surface of a substrate. A heat-conductive film having a higher thermal conductivity than the substrate is disposed at a position different from a position of the active element. An insulating film covering the active element and heat-conductive film is disposed on the first surface. A bump electrically connected to the heat-conductive film is disposed on the insulating film. A via-hole extends from a second surface opposite to the first surface to the heat-conductive film. A heat-conductive member having a higher thermal conductivity than the substrate is continuously disposed from a region of the second surface overlapping the active element in plan view to an inner surface of the via-hole. The bump is connected to a land of a printed circuit board facing the first surface. The semiconductor chip is sealed with a resin.

公开(公告)号：US20190088768A1

公开(公告)日：2019-03-21

申请号：US16125234

申请日：2018-09-07

申请人： Murata Manufacturing Co., Ltd.

发明人： Isao OBU ,  Yasunari UMEMOTO ,  Masahiro SHIBATA ,  Shigeki KOYA ,  Masao KONDO ,  Takayuki TSUTSUI

IPC分类号： H01L29/737 ,  H01L29/205 ,  H01L29/08 ,  H01L29/10 ,  H01L29/417 ,  H01L29/423 ,  H01L29/45 ,  H01L21/306 ,  H01L21/02 ,  H01L21/285 ,  H01L21/311 ,  H01L21/308 ,  H01L29/66 ,  H03F3/213 ,  H03F3/195

摘要： A bipolar transistor includes a collector layer, a base layer, and an emitter layer that are formed in this order on a compound semiconductor substrate. The emitter layer is disposed inside an edge of the base layer in plan view. A base electrode is disposed on partial regions of the emitter layer and the base layer so as to extend from an inside of the emitter layer to an outside of the base layer in plan view. An insulating film is disposed between the base electrode and a portion of the base layer, with the portion not overlapping the emitter layer. An alloy layer extends from the base electrode through the emitter layer in a thickness direction and reaches the base layer. The alloy layer contains at least one element constituting the base electrode and elements constituting the emitter layer and the base layer.

公开(公告)号：US20200251579A1

公开(公告)日：2020-08-06

申请号：US16854262

申请日：2020-04-21

申请人： Murata Manufacturing Co., Ltd.

发明人： Isao OBU ,  Yasunari UMEMOTO ,  Masahiro SHIBATA ,  Shigeki KOYA ,  Masao KONDO ,  Takayuki TSUTSUI

IPC分类号： H01L29/737 ,  H01L29/205 ,  H03F3/195 ,  H03F3/213 ,  H01L29/66 ,  H01L21/308 ,  H01L21/311 ,  H01L21/285 ,  H01L21/02 ,  H01L21/306 ,  H01L29/423 ,  H01L29/417 ,  H01L29/08 ,  H01L29/10 ,  H01L23/00 ,  H03F3/24 ,  H03F1/56 ,  H03F3/21

摘要： A bipolar transistor includes a collector layer, a base layer, and an emitter layer that are formed in this order on a compound semiconductor substrate. The emitter layer is disposed inside an edge of the base layer in plan view. A base electrode is disposed on partial regions of the emitter layer and the base layer so as to extend from an inside of the emitter layer to an outside of the base layer in plan view. An insulating film is disposed between the base electrode and a portion of the base layer, with the portion not overlapping the emitter layer. An alloy layer extends from the base electrode through the emitter layer in a thickness direction and reaches the base layer. The alloy layer contains at least one element constituting the base electrode and elements constituting the emitter layer and the base layer.