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公开(公告)号:US12154214B2
公开(公告)日:2024-11-26
申请号:US17941578
申请日:2022-09-09
Applicant: NVIDIA Corporation
Inventor: Gregory Muthler , John Burgess , Magnus Andersson , Timo Viitanen , Levi Oliver
Abstract: An alternate root tree or graph structure for ray and path tracing enables dynamic instancing build time decisions to split any number of geometry acceleration structures in a manner that is developer transparent, nearly memory storage neutral, and traversal efficient. The resulting traversals only need to partially traverse the acceleration structure, which improves efficiency. One example use reduces the number of false positive instance acceleration structure to geometry acceleration structure transitions for many spatially separated instances of the same geometry.
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12.
公开(公告)号:US12148088B2
公开(公告)日:2024-11-19
申请号:US18129334
申请日:2023-03-31
Applicant: NVIDIA Corporation
Inventor: Greg Muthler , Tero Karras , Samuli Laine , William Parsons Newhall, Jr. , Ronald Charles Babich, Jr. , John Burgess , Ignacio Llamas
IPC: G06T15/06
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.
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公开(公告)号:US11508112B2
公开(公告)日:2022-11-22
申请号:US16905844
申请日:2020-06-18
Applicant: NVIDIA Corporation
Inventor: Gregory Muthler , John Burgess , Ronald Charles Babich, Jr. , William Parsons Newhall, Jr.
Abstract: Techniques are disclosed for improving the throughput of ray intersection or visibility queries performed by a ray tracing hardware accelerator. Throughput is improved, for example, by releasing allocated resources before ray visibility query results are reported by the hardware accelerator. The allocated resources are released when the ray visibility query results can be stored in a compressed format outside of the allocated resources. When reporting the ray visibility query results, the results are reconstructed based on the results stored in the compressed format. The compressed format storage can be used for ray visibility queries that return no intersections or terminate on any hit ray visibility query. One or more individual components of allocated resources can also be independently deallocated based on the type of data to be returned and/or results of the ray visibility query.
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公开(公告)号:US11450057B2
公开(公告)日:2022-09-20
申请号:US16901023
申请日:2020-06-15
Applicant: NVIDIA Corporation
Inventor: Gregory Muthler , John Burgess , Ian Chi Yan Kwong
Abstract: Enhanced techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure and its underlying primitives are disclosed. For example, traversal speed is improved by grouping processing of primitives sharing at least one feature (e.g., a vertex or an edge) during ray-primitive intersection testing. Grouping the primitives for ray intersection testing can reduce processing (e.g., projections and transformations of primitive vertices and/or determining edge function values) because at least a portion of the processing results related to the shared feature in one primitive can be used in determine whether the ray intersects another primitive(s). Processing triangles sharing an edge can double the culling rate of the triangles in the ray/triangle intersection test without replicating the hardware.
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公开(公告)号:US11380041B2
公开(公告)日:2022-07-05
申请号:US16898980
申请日:2020-06-11
Applicant: NVIDIA Corporation
Inventor: Gregory Muthler , John Burgess
Abstract: Enhanced techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure are disclosed. For example, traversal efficiency is improved by combining programmable traversals based on ray operations with per-node static configurations that modify traversal behavior. The per-node static configurations enable creators of acceleration data structures to optimize for potential traversals without necessarily requiring detailed information about ray characteristics and ray operations used when traversing the acceleration structure. Moreover, by providing for selective exclusion of certain nodes using per-node static configurations, less memory is needed to express an acceleration structure that includes, for example, different geometric levels of details corresponding to a single object.
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16.
公开(公告)号:US11200725B2
公开(公告)日:2021-12-14
申请号:US17030008
申请日:2020-09-23
Applicant: NVIDIA Corporation
Inventor: Greg Muthler , Tero Karras , Samuli Laine , William Parsons Newhall, Jr. , Ronald Charles Babich, Jr. , John Burgess , Ignacio Llamas
IPC: G06T15/06
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.
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公开(公告)号:US20210012552A1
公开(公告)日:2021-01-14
申请号:US17032818
申请日:2020-09-25
Applicant: NVIDIA Corporation
Inventor: Samuli LAINE , Tero Karras , Timo Aila , Robert Ohannessian , William Parsons Newhall, JR. , Greg Muthler , Ian Kwong , Peter Nelson , John Burgess
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.
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18.
公开(公告)号:US20210005010A1
公开(公告)日:2021-01-07
申请号:US17030008
申请日:2020-09-23
Applicant: NVIDIA Corporation
Inventor: Greg Muthler , Tero Karras , Samuli Laine , William Parsons Newhall, JR. , Ronald Charles Babich, JR. , John Burgess , Ignacio Llamas
IPC: G06T15/06
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.
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公开(公告)号:US10885698B2
公开(公告)日:2021-01-05
申请号:US16101232
申请日:2018-08-10
Applicant: NVIDIA Corporation
Inventor: Greg Muthler , Ronald Charles Babich, Jr. , William Parsons Newhall, Jr. , Peter Nelson , James Robertson , John Burgess
Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.
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20.
公开(公告)号:US20200051312A1
公开(公告)日:2020-02-13
申请号:US16101066
申请日:2018-08-10
Applicant: NVIDIA Corporation
Inventor: Greg Muthler , Tero Karras , Samuli Laine , William Parsons Newhall, JR. , Ronald Charles Babich, JR. , John Burgess , Ignacio Llamas
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.
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