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    Fine-grained parallel traversal for ray tracing
    11.
    发明授权
    Fine-grained parallel traversal for ray tracing 有权
    细粒度平行遍历用于光线跟踪

    公开(公告)号：US09305392B2

    公开(公告)日：2016-04-05

    申请号：US13714284

    申请日：2012-12-13

    Applicant: NVIDIA Corporation

    Inventor： David Luebke ,  Timo Aila ,  Jacopo Pantaleoni ,  David Tarjan

    IPC: G06T15/00 ,  G06T15/40 ,  G06T15/06 ,  G06T17/00

    CPC classification number: G06T15/06 ,  G06T17/005 ,  G06T2210/52

    Abstract: Techniques are disclosed for tracing a ray within a parallel processing unit. A first thread receives a ray or a ray segment for tracing and identifies a first node within an acceleration structure associated with the ray, where the first node is associated with a volume of space traversed by the ray. The thread identifies the child nodes of the first node, where each child node is associated with a different sub-volume of space, and each sub-volume is associated with a corresponding ray segment. The thread determines that two or more nodes are associated with sub-volumes of space that intersect the ray segment. The thread selects one of these nodes for processing by the first thread and another for processing by a second thread. One advantage of the disclosed technique is that the threads in a thread group perform ray tracing more efficiently in that idle time is reduced.

    Abstract translation: 公开了用于跟踪并行处理单元内的射线的技术。 第一线程接收用于跟踪的射线或射线段，并识别与射线相关联的加速结构内的第一节点，其中第一节点与由射线穿过的空间体积相关联。 该线程标识第一节点的子节点，其中每个子节点与不同的子体积的空间相关联，并且每个子卷与相应的射线段相关联。 线程确定两个或多个节点与与射线段相交的空间的子卷相关联。 线程选择其中一个节点进行第一个线程处理，另一个线程由第二个线程进行处理。 所公开技术的一个优点是螺纹组中的螺纹更有效地执行光线追踪，从而减少了空闲时间。

    SORTING WITH KEY MODIFICATION
    12.
    发明申请
    SORTING WITH KEY MODIFICATION 有权
    与主要修改对齐

    公开(公告)号：US20140351276A1

    公开(公告)日：2014-11-27

    申请号：US13899319

    申请日：2013-05-21

    Applicant: NVIDIA Corporation

    Inventor： Tero Tapani Karras ,  Timo Aila

    IPC: G06F17/30

    CPC classification number: G06F7/24

    Abstract: This disclosure is directed to systems and methods for sorting data in which pre-sorting operations are performed on keys prior to those keys being reordered within memory. One example method includes generating, for each of a plurality of keys, an associated modified key. This operation is an example pre-sorting operation that occurs prior to any reordering of the keys. Once the modified keys are generated, the modified keys and/or associated information are processed in order to change the ordering of the keys in memory.

    Abstract translation: 本公开涉及用于分类数据的系统和方法，其中在这些密钥在存储器内重新排序之前对密钥执行预排序操作。 一个示例性方法包括为多个密钥中的每一个生成相关联的修改密钥。 此操作是在键的任何重新排序之前发生的示例预排序操作。 一旦生成了修改的密钥，则处理修改的密钥和/或相关联的信息，以便改变存储器中密钥的顺序。

    METHOD FOR FEW-SHOT UNSUPERVISED IMAGE-TO-IMAGE TRANSLATION
    14.
    发明申请
    METHOD FOR FEW-SHOT UNSUPERVISED IMAGE-TO-IMAGE TRANSLATION 审中-公开

    公开(公告)号：US20200242736A1

    公开(公告)日：2020-07-30

    申请号：US16261395

    申请日：2019-01-29

    Applicant: Nvidia Corporation

    Inventor： Ming-Yu Liu ,  Xun Huang ,  Tero Karras ,  Timo Aila ,  Jaakko Lehtinen

    IPC: G06T3/60 ,  G06T3/00 ,  G06K9/62 ,  G06T7/73

    Abstract: A few-shot, unsupervised image-to-image translation (“FUNIT”) algorithm is disclosed that accepts as input images of previously-unseen target classes. These target classes are specified at inference time by only a few images, such as a single image or a pair of images, of an object of the target type. A FUNIT network can be trained using a data set containing images of many different object classes, in order to translate images from one class to another class by leveraging few input images of the target class. By learning to extract appearance patterns from the few input images for the translation task, the network learns a generalizable appearance pattern extractor that can be applied to images of unseen classes at translation time for a few-shot image-to-image translation task.

    Sorting with key modification
    15.
    发明授权
    Sorting with key modification 有权
    按关键修改进行排序

    公开(公告)号：US09405508B2

    公开(公告)日：2016-08-02

    申请号：US13899319

    申请日：2013-05-21

    Applicant: NVIDIA Corporation

    Inventor： Tero Tapani Karras ,  Timo Aila

    IPC: G06F7/00 ,  G06F17/30 ,  G06F7/24

    CPC classification number: G06F7/24

    Abstract: This disclosure is directed to systems and methods for sorting data in which pre-sorting operations are performed on keys prior to those keys being reordered within memory. One example method includes generating, for each of a plurality of keys, an associated modified key. This operation is an example pre-sorting operation that occurs prior to any reordering of the keys. Once the modified keys are generated, the modified keys and/or associated information are processed in order to change the ordering of the keys in memory.

    Abstract translation: 本公开涉及用于分类数据的系统和方法，其中在这些密钥在存储器内重新排序之前对密钥执行预排序操作。 一个示例性方法包括为多个密钥中的每一个生成相关联的修改密钥。 此操作是在键的任何重新排序之前发生的示例预排序操作。 一旦生成了修改的密钥，则处理修改的密钥和/或相关联的信息，以便改变存储器中密钥的顺序。

    Method and system for graphics rendering employing gradient domain metropolis light transport
    19.
    发明授权
    Method and system for graphics rendering employing gradient domain metropolis light transport 有权
    使用梯度域大都市光传输的图形渲染方法和系统

    公开(公告)号：US09437039B2

    公开(公告)日：2016-09-06

    申请号：US13730320

    申请日：2012-12-28

    Applicant: NVIDIA Corporation

    Inventor： Jaakko Lehtinen ,  Timo Aila ,  Samuli Laine ,  Tero Karras ,  David Luebke

    IPC: G06T15/50

    CPC classification number: G06T15/50 ,  G06T15/506

    Abstract: A method of generating an image. The method includes simulating a presence of at least one light source within a virtualized three dimensional space. Within the virtualized three dimensional space, a light sensing plane is defined. The light sensing plane includes a matrix of a number of pixels to be displayed on a display screen. The method further includes using a light transport procedure, computing a gradient value for each pixel of the matrix to produce a number of gradient values. The gradient computation involves selecting a plurality of light path pairs that contribute to a pixel wherein the selection is biased towards selection of more light paths that pass through pixels having larger gradient values. The plurality of gradient values are converted to a plurality of light intensity values which represent the image.

    Abstract translation: 一种产生图像的方法。 该方法包括模拟虚拟三维空间内的至少一个光源的存在。 在虚拟三维空间内，定义光感测平面。 光检测平面包括要在显示屏上显示的多个像素的矩阵。 该方法还包括使用光传输过程，计算矩阵的每个像素的梯度值以产生多个梯度值。 梯度计算涉及选择有助于像素的多个光路对，其中选择偏向选择通过具有较大梯度值的像素的更多光路径。 将多个梯度值转换为表示图像的多个光强度值。

    Hardware scheduling of ordered critical code sections
    20.
    发明授权
    Hardware scheduling of ordered critical code sections 有权
    有序关键代码段的硬件调度

    公开(公告)号：US09158595B2

    公开(公告)日：2015-10-13

    申请号：US13660741

    申请日：2012-10-25

    Applicant: NVIDIA Corporation

    Inventor： John Erik Lindholm ,  Tero Tapani Karras ,  Samuli Matias Laine ,  Timo Aila

    IPC: G06F9/52 ,  G06F9/48

    CPC classification number: G06F9/522 ,  G06F9/30087 ,  G06F9/3834 ,  G06F9/3851 ,  G06F9/4881 ,  G06F2209/484

    Abstract: One embodiment sets forth a technique for scheduling the execution of ordered critical code sections by multiple threads. A multithreaded processor includes an instruction scheduling unit that is configured to schedule threads to process ordered critical code sections. A ordered critical code section is preceded by a barrier instruction and when all of the threads have reached the barrier instruction, the instruction scheduling unit controls the thread execution order by selecting each thread for execution based on logical identifiers associated with the threads. The logical identifiers are mapped to physical identifiers that are referenced by the multithreaded processor during execution of the threads. The logical identifiers are used by the instruction scheduling unit to control the order in which the threads execute the ordered critical code section.

    Abstract translation: 一个实施例提出了一种用于通过多个线程来调度有序关键代码段的执行的技术。 多线程处理器包括指令调度单元，其被配置为调度线程以处理有序的关键代码段。 有序的关键代码部分之前是屏障指令，并且当所有线程已经到达屏障指令时，指令调度单元通过基于与线程相关联的逻辑标识符选择用于执行的每个线程来控制线程执行顺序。 逻辑标识符被映射到在执行线程期间由多线程处理器引用的物理标识符。 逻辑标识符被指令调度单元用于控制线程执行有序关键代码段的顺序。

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