公开(公告)号：US20180095490A1

公开(公告)日：2018-04-05

申请号：US15821817

申请日：2017-11-23

Applicant: NXP B.V.

Inventor： Chiahung Su ,  Madan Mohan Reddy Vemula ,  Abjijeet Chandrakant Kulkarni ,  Kenneth Jaramillo ,  Siamak Delshadpour ,  Xueyang Geng

IPC: G05F3/02 ,  H04L12/10 ,  G06F1/32 ,  G06F1/26 ,  H04L12/26 ,  H02J4/00

CPC classification number: G05F3/02 ,  G06F1/266 ,  G06F1/3253 ,  H02J4/00 ,  H04L12/10 ,  H04L43/08 ,  H04L43/16 ,  Y02D10/151 ,  Y02D50/20 ,  Y04S40/168

Abstract: Low power solutions can be provided in a serial bus system with a logic controller circuit. The logic controller circuit can include analog circuitry that includes a plurality of analog components and trimming circuitry for configuring the analog components. Digital circuitry can be configured to switch between an active mode and a hibernation mode, wherein the hibernation mode consumes less current than the active mode. A voltage regulator circuit can be configured to generate a regulated voltage from a supply voltage. A reset generation circuit can be configured to determine that the supply voltage has reached a first threshold voltage level and enable the voltage regulator circuit. When the regulated voltage has reached a second threshold voltage level and the supply voltage has reached a third threshold voltage level, the digital circuitry can be switched to the active mode.