公开(公告)号：US20050070044A1

公开(公告)日：2005-03-31

申请号：US10675880

申请日：2003-09-30

Applicant: Sandeep Sane ,  Biju Chandran

Inventor： Sandeep Sane ,  Biju Chandran

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L21/56 ,  H01L21/60

CPC classification number: H01L24/81 ,  H01L21/56 ,  H01L21/563 ,  H01L24/28 ,  H01L2224/16225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/8191 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2924/00

Abstract: A method of packaging a die includes reflowing the solder to electrically connect the die to a substrate at a first temperature, cooling the die and substrate to a second temperature, and placing a heated epoxy in contact with the die and the substrate. The method also includes holding the die and substrate at the second temperature for a time sufficient to allow the epoxy to cure, and cooling the die, substrate and epoxy. The second temperature is less than the first temperature. In addition, the die and substrate are not cooled to a temperature significantly below the second temperature until after the heated epoxy is placed in contact with the die and substrate.

公开(公告)号：US20110241208A1

公开(公告)日：2011-10-06

申请号：US13161538

申请日：2011-06-16

Applicant: Ravi Mahajan ,  Sandeep Sane

Inventor： Ravi Mahajan ,  Sandeep Sane

IPC: H01L23/48

CPC classification number: H05K1/142 ,  H01L24/16 ,  H01L25/0655 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1607 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15192 ,  H05K1/141 ,  H05K1/181 ,  H05K1/183 ,  H05K2201/0187 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/05647

Abstract: A microelectronic package comprises a substrate (110), a silicon patch (120) embedded in the substrate, a first interconnect structure (131) at a first location of the silicon patch and a second interconnect structure (132) at a second location of the silicon patch, and an electrically conductive line (150) in the silicon patch connecting the first interconnect structure and the second interconnect structure to each other.

Abstract translation: 微电子封装包括衬底（110），嵌入衬底中的硅贴片（120），在硅贴片的第一位置处的第一互连结构（131）和在第二位置处的第二互连结构（132） 硅贴片以及将第一互连结构和第二互连结构彼此连接的硅贴片中的导电线（150）。

公开(公告)号：US07781260B2

公开(公告)日：2010-08-24

申请号：US11853752

申请日：2007-09-11

Applicant: Sandeep Sane ,  Nachiket Raravikar

Inventor： Sandeep Sane ,  Nachiket Raravikar

IPC: H01L21/44 ,  H01L21/48

CPC classification number: H01L21/563 ,  H01L23/291 ,  H01L23/293 ,  H01L23/3157 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1182 ,  H01L2224/11827 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13687 ,  H01L2224/13693 ,  H01L2224/16225 ,  H01L2224/165 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/814 ,  H01L2224/8192 ,  H01L2224/81948 ,  H01L2224/831 ,  H01L2224/83379 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/3512

Abstract: Methods and associated structures of forming microelectronic devices are described. Those methods may include coating an interconnect structure disposed on a die with a layer of functionalized nanoparticles, wherein the functionalized nanoparticles are dispersed in a solvent, heating the layer of functionalized nanoparticles to drive off a portion of the solvent, and applying an underfill on the coated interconnect structure.

Abstract translation: 描述形成微电子器件的方法和相关结构。 这些方法可以包括用功能化纳米颗粒层涂布设置在管芯上的互连结构，其中官能化纳米颗粒分散在溶剂中，加热功能化纳米颗粒层以驱除溶剂的一部分，并将底部填充物 涂层互连结构。

公开(公告)号：US20060003496A1

公开(公告)日：2006-01-05

申请号：US11167509

申请日：2005-06-27

Applicant: Sandeep Sane ,  Biju Chandran

Inventor： Sandeep Sane ,  Biju Chandran

IPC: H01L23/04 ,  H01L21/50 ,  H01L21/48 ,  H01L21/44

CPC classification number: H01L24/81 ,  H01L21/56 ,  H01L21/563 ,  H01L24/28 ,  H01L2224/16225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/8191 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2924/00

Abstract: A method of packaging a die includes reflowing the solder to electrically connect the die to a substrate at a first temperature, cooling the die and substrate to a second temperature, and placing a heated epoxy in contact with the die and the substrate. The method also includes holding the die and substrate at the second temperature for a time sufficient to allow the epoxy to cure, and cooling the die, substrate and epoxy. The second temperature is less than the first temperature. In addition, the die and substrate are not cooled to a temperature significantly below the second temperature until after the heated epoxy is placed in contact with the die and substrate.

Abstract translation: 包装模具的方法包括回流焊料以在第一温度下将管芯与基板电连接，将管芯和衬底冷却至第二温度，以及将加热的环氧树脂与管芯和衬底接触。 该方法还包括将模具和衬底保持在第二温度足够长的时间以使环氧树脂固化，以及冷却模具，衬底和环氧树脂。 第二个温度小于第一个温度。 此外，模具和衬底没有被冷却到显着低于第二温度的温度，直到加热的环氧树脂与裸片和衬底接触。