公开(公告)号：US12131997B2

公开(公告)日：2024-10-29

申请号：US17844337

申请日：2022-06-20

申请人： SK hynix Inc.

发明人： Won Duck Jung

IPC分类号： H01L23/528 ,  H01L23/00 ,  H01L23/552 ,  H01L25/065 ,  H01L23/498

CPC分类号： H01L23/5286 ,  H01L23/528 ,  H01L23/552 ,  H01L24/05 ,  H01L24/46 ,  H01L25/0657 ,  H01L23/49816 ,  H01L24/48 ,  H01L2224/48 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48228 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06537 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2924/15184 ,  H01L2924/15192 ,  H01L2924/15311

摘要： A semiconductor package is configured to include a package substrate, a semiconductor chip disposed on the package substrate, and bonding wires. The package substrate includes a first column of bond fingers disposed in a first layer and a second column of bond fingers disposed in a second layer. The semiconductor chip includes a first column of chip pads arrayed in a first column and a second column of chip pads arrayed in a second column adjacent to the first column. The first column of chip pads are connected to the first column of bond fingers, respectively, through first bonding wires, and the second column of chip pads are connected to the second column of bond fingers, respectively, through second bonding wires.

公开(公告)号：US10014644B2

公开(公告)日：2018-07-03

申请号：US13213258

申请日：2011-08-19

申请人： Reto Eggimann ,  Alfred Braun

发明人： Reto Eggimann ,  Alfred Braun

IPC分类号： B21F9/00 ,  H01R43/28 ,  B21F1/00 ,  H01L23/00 ,  H01R43/052

CPC分类号： H01R43/28 ,  B21F1/00 ,  B21F9/002 ,  H01L24/78 ,  H01L2224/78 ,  H01L2924/00014 ,  H01R43/052 ,  H01L2224/48 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： An apparatus for the formation of a wire loop comprises a wire drive for advancing a wire and a loop layer to grip a first end of the wire and to lay a wire loop. When the wire is advanced, the wire loop is formed into a selected size. The apparatus also includes a pull-out gripper and a sensor device, the pull-out gripper being configured to grasp the wire of the wire loop and, after grasping the wire of the wire loop, move relative to the loop layer, thereby tensioning the wire loop in a longitudinal direction. The sensor device can detect a twist in the wire loop.

公开(公告)号：US09966319B1

公开(公告)日：2018-05-08

申请号：US13785959

申请日：2013-03-05

申请人： Erick Merle Spory

发明人： Erick Merle Spory

IPC分类号： H01L21/04 ,  H01L23/04 ,  H01L21/52

CPC分类号： H01L24/49 ,  H01L21/4803 ,  H01L21/52 ,  H01L23/04 ,  H01L23/047 ,  H01L23/057 ,  H01L23/10 ,  H01L23/49551 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L24/98 ,  H01L2224/02311 ,  H01L2224/02317 ,  H01L2224/02331 ,  H01L2224/02375 ,  H01L2224/02377 ,  H01L2224/03312 ,  H01L2224/03332 ,  H01L2224/03334 ,  H01L2224/03901 ,  H01L2224/04042 ,  H01L2224/0508 ,  H01L2224/05144 ,  H01L2224/05548 ,  H01L2224/05582 ,  H01L2224/05583 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/06051 ,  H01L2224/06102 ,  H01L2224/2919 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/73265 ,  H01L2224/741 ,  H01L2224/83192 ,  H01L2224/85207 ,  H01L2224/98 ,  H01L2924/00014 ,  H01L2924/15153 ,  H01L2924/16152 ,  H01L2224/48 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method for assembling a packaged integrated circuit for operating reliably at elevated temperatures is provided. The method includes providing an extended bond pad over an original die pad of an extracted die to create a modified extracted die. The extracted die is a fully functional semiconductor die that has been removed from a finished packaged integrated circuit. The method also includes placing the modified extracted die into a cavity of a package base and bonding a new bond wire between the extended bond pad and a lead of the package base or a downbond, and sealing a package lid to the package base and the cavity of the package.

公开(公告)号：US20180102353A1

公开(公告)日：2018-04-12

申请号：US15839501

申请日：2017-12-12

申请人： STMicroelectronics S.r.l.

发明人： Alberto Pagani

IPC分类号： H01L27/02 ,  H05K1/18 ,  H01L21/683 ,  H01L25/065 ,  H01L23/00 ,  H01L23/66 ,  H01L23/48 ,  H01L23/31 ,  H01L21/768 ,  H01L25/10 ,  H01L23/498 ,  H01L21/66 ,  H01L21/56

CPC分类号： H01L27/0203 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/768 ,  H01L22/22 ,  H01L23/3128 ,  H01L23/48 ,  H01L23/49833 ,  H01L23/66 ,  H01L24/02 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/09 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/94 ,  H01L24/95 ,  H01L25/0657 ,  H01L25/105 ,  H01L2221/68304 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2223/6677 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/02319 ,  H01L2224/02321 ,  H01L2224/02371 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05569 ,  H01L2224/06187 ,  H01L2224/08137 ,  H01L2224/08146 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/14183 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2105 ,  H01L2224/211 ,  H01L2224/28105 ,  H01L2224/29024 ,  H01L2224/30183 ,  H01L2224/32145 ,  H01L2224/32227 ,  H01L2224/45015 ,  H01L2224/45099 ,  H01L2224/48 ,  H01L2224/48091 ,  H01L2224/48175 ,  H01L2224/73207 ,  H01L2224/73215 ,  H01L2224/73251 ,  H01L2224/82106 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2225/06531 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/06596 ,  H01L2225/1023 ,  H01L2225/1064 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15159 ,  H01L2924/207 ,  H05K1/181 ,  H05K1/189 ,  H05K2201/10515 ,  Y02P70/611 ,  H01L2224/02 ,  H01L2224/08 ,  H01L2224/16 ,  H01L2224/32 ,  H01L2224/19 ,  H01L2924/00

摘要： An electronic system supports superior coupling by implementing a communication mechanism that provides at least for horizontal communication for example, on the basis of wired and/or wireless communication channels, in the system. Hence, by enhancing vertical and horizontal communication capabilities in the electronic system, a reduced overall size may be achieved, while nevertheless reducing complexity in printed circuit boards coupled to the electronic system. In this manner, overall manufacturing costs and reliability of complex electronic systems may be enhanced.

公开(公告)号：US20180053702A1

公开(公告)日：2018-02-22

申请号：US15792225

申请日：2017-10-24

申请人： Erick Merle Spory

发明人： Erick Merle Spory

IPC分类号： H01L23/20 ,  H01L23/00 ,  H01L21/48 ,  H01L23/04 ,  H01L23/495 ,  H01L23/498 ,  H01L21/50 ,  H01L23/26

CPC分类号： H01L23/20 ,  H01L21/4803 ,  H01L21/4817 ,  H01L21/50 ,  H01L23/04 ,  H01L23/10 ,  H01L23/26 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49861 ,  H01L23/564 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24175 ,  H01L2224/245 ,  H01L2224/25171 ,  H01L2224/2731 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48 ,  H01L2224/73267 ,  H01L2224/82102 ,  H01L2224/82103 ,  H01L2224/82214 ,  H01L2224/82815 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/8385 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/3656 ,  H01L2924/3861

摘要： A method is provided. The method includes one or more of removing existing ball bonds from an extracted die, placing the extracted die into a recess of a hermetic substrate, the extracted die having a centered orientation in the recess, and applying a side fill compound into the recess between the extracted die and the hermetic substrate. The method also includes 3D printing, by a 3D printer, a plurality of bond connections between die pads of the extracted die and first bond pads of the hermetic substrate in order to create a 3D printed die substrate, and 3D printing a hermetic encapsulation over the die, the side fill compound, and the 3D printed bond connections in order to create a hermetic assembly. The extracted die includes a fully functional semiconductor die removed from a previous package. The hermetic substrate includes the first bond pads coupled to second bond pads.

公开(公告)号：US20180040529A1

公开(公告)日：2018-02-08

申请号：US15792381

申请日：2017-10-24

申请人： Erick Merle Spory

发明人： Erick Merle Spory

IPC分类号： H01L23/20 ,  H01L21/48 ,  H01L23/04 ,  H01L23/498 ,  H01L21/50 ,  H01L23/26 ,  H01L23/00 ,  H01L23/495

CPC分类号： H01L23/20 ,  H01L21/4803 ,  H01L21/4817 ,  H01L21/4867 ,  H01L21/50 ,  H01L23/04 ,  H01L23/057 ,  H01L23/10 ,  H01L23/26 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49838 ,  H01L23/49861 ,  H01L23/564 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24175 ,  H01L2224/245 ,  H01L2224/25171 ,  H01L2224/2731 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48 ,  H01L2224/82102 ,  H01L2224/82103 ,  H01L2224/82214 ,  H01L2224/82815 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/8385 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/3656 ,  H01L2924/3861

摘要： An integrated circuit is provided. The integrated circuit includes a package base including package leads, an extracted die removed from a previous packaged integrated circuit, and an an interposer bonded to the extracted die and the package base. The extracted die includes original bond pads and one or more original ball bonds on the original bond pads. The interposer includes first bond pads electrically connected to the original bond pads with 3D printed first bond connections conforming to the shapes and surfaces of the extracted die and the interposer and second bond pads electrically connected to the package leads with 3D printed second bond connections conforming to shapes and surfaces of the interposer and package base.

公开(公告)号：US20180019279A1

公开(公告)日：2018-01-18

申请号：US15718349

申请日：2017-09-28

申请人： Sony Corporation

发明人： Kazuichiroh Itonaga ,  Machiko Horiike

IPC分类号： H01L27/146 ,  H04N5/374 ,  H01L21/768 ,  H01L23/48 ,  H01L23/552 ,  H01L31/02

CPC分类号： H01L27/14647 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/552 ,  H01L27/14603 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14638 ,  H01L27/1464 ,  H01L27/14687 ,  H01L27/1469 ,  H01L31/02002 ,  H01L2224/08145 ,  H01L2224/24147 ,  H01L2224/45147 ,  H01L2224/80001 ,  H01L2224/80896 ,  H01L2224/8203 ,  H01L2224/92 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01015 ,  H01L2924/01047 ,  H01L2924/13091 ,  H01L2924/3011 ,  H04N5/374 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/82

摘要： A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.

公开(公告)号：US09842775B2

公开(公告)日：2017-12-12

申请号：US15218536

申请日：2016-07-25

申请人： STATS ChipPAC Pte. Ltd.

发明人： Pandi C. Marimuthu ,  Shuangwu Huang ,  Nathapong Suthiwongsunthorn

IPC分类号： H01L21/768 ,  H01L21/56 ,  H01L23/31 ,  H01L23/48 ,  H01L23/00 ,  H01L25/10 ,  H01L23/498 ,  H01L21/302 ,  H01L25/065

CPC分类号： H01L21/76898 ,  H01L21/302 ,  H01L21/56 ,  H01L21/561 ,  H01L21/76885 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/49811 ,  H01L24/02 ,  H01L24/04 ,  H01L24/05 ,  H01L24/06 ,  H01L24/10 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/02166 ,  H01L2224/02181 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05083 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/10125 ,  H01L2224/1184 ,  H01L2224/11901 ,  H01L2224/13009 ,  H01L2224/1301 ,  H01L2224/13025 ,  H01L2224/13027 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1403 ,  H01L2224/14104 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/48 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/1058 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15174 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/182 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2224/13099 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/11849 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a conductive via in a first surface of a substrate. A first interconnect structure is formed over the first surface of the substrate. A first bump is formed over the first interconnect structure. The first bump is formed over or offset from the conductive via. An encapsulant is deposited over the first bump and first interconnect structure. A portion of the encapsulant is removed to expose the first bump. A portion of a second surface of the substrate is removed to expose the conductive via. The encapsulant provides structural support and eliminates the need for a separate carrier wafer when thinning the substrate. A second interconnect structure is formed over the second surface of the substrate. A second bump is formed over the first bump. A plurality of semiconductor devices can be stacked and electrically connected through the conductive via.

公开(公告)号：US09837287B2

公开(公告)日：2017-12-05

申请号：US15482346

申请日：2017-04-07

申请人： Semiconductor Manufacturing International (Shanghai) Corporation

发明人： Yuankun Hou ,  Kuanchieh Yu ,  Yu Hua ,  Yuelin Zhao

IPC分类号： H01L21/30 ,  H01L21/56 ,  H01L25/00 ,  H01L25/065 ,  H01L23/10 ,  H01L21/306 ,  H01L21/308

CPC分类号： H01L21/56 ,  H01L21/30604 ,  H01L21/308 ,  H01L22/12 ,  H01L23/10 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/27 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/80 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04026 ,  H01L2224/05571 ,  H01L2224/0612 ,  H01L2224/08145 ,  H01L2224/08148 ,  H01L2224/2761 ,  H01L2224/29011 ,  H01L2224/29012 ,  H01L2224/29013 ,  H01L2224/29014 ,  H01L2224/29078 ,  H01L2224/30145 ,  H01L2224/32145 ,  H01L2224/32148 ,  H01L2224/80011 ,  H01L2224/80203 ,  H01L2224/80805 ,  H01L2224/8081 ,  H01L2224/80895 ,  H01L2224/83011 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83805 ,  H01L2224/8381 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2924/00015 ,  H01L2924/0002 ,  H01L2924/163 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/2919 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/80

摘要： A method of forming a sealing structure for a bonded wafer is provided. The method includes providing the lower wafer and the upper wafer, forming a sealing material layer on each of the lower wafer and the upper wafer, forming a mask layer on the sealing material layer on each of the lower wafer and the upper wafer, etching the sealing material layer using the mask layer as an etch mask, so as to form a first protrusion at an edge of the lower wafer and a second protrusion at an edge of the upper wafer, and bonding the first protrusion and the second protrusion together to form the sealing structure. The sealing structure encloses a gap between the lower wafer and the upper wafer at an edge of the bonded wafer, so as to form a hermetically sealed cavity at the edge of the bonded wafer.

公开(公告)号：US09818785B2

公开(公告)日：2017-11-14

申请号：US15230281

申请日：2016-08-05

申请人： Sony Corporation

发明人： Hiroshi Takahashi ,  Taku Umebayashi

IPC分类号： H01L27/146 ,  H01L21/768 ,  H01L23/48 ,  H01L23/00 ,  H01L31/02 ,  H01L31/0203 ,  H01L31/0232 ,  H01L31/18 ,  H01L21/762

CPC分类号： H01L27/14636 ,  H01L21/76251 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/05 ,  H01L27/14632 ,  H01L27/14634 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14687 ,  H01L27/1469 ,  H01L31/02005 ,  H01L31/0203 ,  H01L31/02325 ,  H01L31/18 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01047 ,  H01L2924/10253 ,  H01L2924/12043 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2224/45099

摘要： A semiconductor device having a first semiconductor section including a first wiring layer at one side thereof; a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together with the respective first and second wiring layer sides of the first and second semiconductor sections facing each other; a conductive material extending through the first semiconductor section to the second wiring layer of the second semiconductor section and by means of which the first and second wiring layers are in electrical communication; and an opening, other than the opening for the conductive material, which extends through the first semiconductor section to the second wiring layer.