System and method for sensor failure detection
    11.
    发明授权
    System and method for sensor failure detection 有权
    传感器故障检测的系统和方法

    公开(公告)号:US08854475B2

    公开(公告)日:2014-10-07

    申请号:US13763562

    申请日:2013-02-08

    CPC classification number: H04N17/002 H04N5/357 H04N5/367

    Abstract: A novel image sensor includes a pixel array, a row control circuit, a test signal injection circuit, a sampling circuit, an image processing circuit, a comparison circuit, and a control circuit. In a particular embodiment, the test signal injection circuit injects test signals into the pixel array, the sampling circuit acquires pixel data from the pixel array, and the comparison circuit compares the pixel data with the test signals. If the pixel data does not correspond to the test signals, the comparison circuit outputs an error signal. Additional comparison circuits are provided to detect defects in the control circuitry of an image sensor.

    Abstract translation: 一种新颖的图像传感器包括像素阵列,行控制电路,测试信号注入电路,采样电路,图像处理电路,比较电路和控制电路。 在特定实施例中,测试信号注入电路将测试信号注入到像素阵列中,采样电路从像素阵列获取像素数据,并且比较电路将像素数据与测试信号进行比较。 如果像素数据不对应于测试信号,则比较电路输出误差信号。 提供附加的比较电路来检测图像传感器的控制电路中的缺陷。

    RANDOM SAMPLING FOR HORIZONTAL NOISE REDUCTION

    公开(公告)号:US20180184022A1

    公开(公告)日:2018-06-28

    申请号:US15390292

    申请日:2016-12-23

    Inventor: Robert Johansson

    CPC classification number: H04N5/378

    Abstract: An example apparatus for random sampling for horizontal noise reduction includes readout circuitry coupled to receive image data from an array of pixels, the readout circuitry including a plurality of sample and hold (S&H) circuits coupled to respective ones of a plurality of bitlines to sample and hold the image data in response to a plurality of S&H control signals, each of the plurality of S&H circuits including an S&H capacitor and an S&H switch. The S&H capacitor samples and holds respective image data, and the S&H switch coupled between a respective bitline and to the respective S&H capacitor, and further coupled to receive a respective one of the plurality of S&H control signals to open/close the S&H switch, where each of the plurality of S&H switches are opened to decouple their respective S&H capacitors from the respective bitlines at a different.

    IMAGE SENSOR FAILURE DETECTION
    13.
    发明申请

    公开(公告)号:US20180160109A1

    公开(公告)日:2018-06-07

    申请号:US15369504

    申请日:2016-12-05

    Inventor: Robert Johansson

    CPC classification number: H04N5/378 H04N17/002

    Abstract: A novel image sensor includes error detection circuitry for detecting sequencing errors. In a particular embodiment a pattern is inserted into a captured image and an image processor detects sequencing errors by determining a location of the pattern. In a more particular embodiment, the image sensor includes a pixel array, arranged in columns and rows. A row select signal is encoded as a bitwise signal, and the bitwise signal is decoded by a multi-input AND gate associated with a particular column of the image sensor, based on a relationship between rows and columns of the pixel array. The relationship determines the pattern asserted into the captured image.

    Method and system for implementing correlated multi-sampling with improved analog-to-digital converter linearity
    14.
    发明授权
    Method and system for implementing correlated multi-sampling with improved analog-to-digital converter linearity 有权
    用于实现具有改进的模数转换器线性度的相关多重采样的方法和系统

    公开(公告)号:US09491390B2

    公开(公告)日:2016-11-08

    申请号:US14555062

    申请日:2014-11-26

    Inventor: Robert Johansson

    CPC classification number: H04N5/378 H03M1/0634 H04N5/3575

    Abstract: A method of implementing Correlated Multi-Sampling (CMS) in an image sensor with improved analog-to-digital converter (ADC) linearity starts with an ADC circuitry included in a readout circuitry that generates a plurality of uncorrelated random numbers used as a plurality of ADC pedestals for sampling image data. A Successive Approximation Register (SAR) included in the ADC circuitry stores a different one of the ADC pedestals before each sampling of the image data. The ADC circuitry samples an image data from a row a plurality of times against plurality of ADC pedestals to obtain a plurality of sampled input data. The ADC circuitry converts each of the plurality of sampled input data from analog to digital, which includes performing a binary search using the SAR. Other embodiments are also described.

    Abstract translation: 在具有改进的模数转换器(ADC)线性的图像传感器中实现相关多采样(CMS)的方法从包括在读出电路中的ADC电路开始,该读出电路产生多个不相关的随机数作为多个 用于采样图像数据的ADC基座。 ADC电路中包含的连续近似寄存器(SAR)在每次采样图像数据之前存储不同的ADC基座。 ADC电路对多个ADC基座多次对来自行的图像数据进行采样,以获得多个采样的输入数据。 ADC电路将多个采样输入数据中的每一个从模拟转换为数字,其中包括使用SAR执行二进制搜索。 还描述了其它实施例。

    Compensation for dual conversion gain high dynamic range sensor
    15.
    发明授权
    Compensation for dual conversion gain high dynamic range sensor 有权
    补偿双转换增益高动态范围传感器

    公开(公告)号:US09386240B1

    公开(公告)日:2016-07-05

    申请号:US14656341

    申请日:2015-03-12

    Abstract: An image sensor, readout circuitry for an image sensor, and a method of operating readout circuitry are disclosed. Readout circuitry includes an analog-to-digital-converter (“ADC”) including input stage circuitry with a first selectable input and a second selectable input. The ADC is coupled to sequentially receive a first reset signal, a second reset signal, a high gain image signal, and a low gain image signal, in that order. The input stage circuitry is configured to select the first selectable input when receiving the first reset signal and the low gain image signal and select the second selectable input when receiving the second reset signal and the high gain image signal.

    Abstract translation: 公开了一种用于图像传感器的图像传感器,读出电路和操作读出电路的方法。 读出电路包括模数转换器(“ADC”),其包括具有第一可选输入和第二可选输入的输入级电路。 ADC依次依次接收第一复位信号,第二复位信号,高增益图像信号和低增益图像信号。 输入级电路被配置为当接收第一复位信号和低增益图像信号时选择第一可选择输入,并且当接收第二复位信号和高增益图像信号时选择第二可选择输入。

    SYSTEM AND METHOD FOR SENSOR FAILURE DETECTION
    16.
    发明申请
    SYSTEM AND METHOD FOR SENSOR FAILURE DETECTION 有权
    传感器故障检测系统及方法

    公开(公告)号:US20140226027A1

    公开(公告)日:2014-08-14

    申请号:US13763562

    申请日:2013-02-08

    CPC classification number: H04N17/002 H04N5/357 H04N5/367

    Abstract: A novel image sensor includes a pixel array, a row control circuit, a test signal injection circuit, a sampling circuit, an image processing circuit, a comparison circuit, and a control circuit. In a particular embodiment, the test signal injection circuit injects test signals into the pixel array, the sampling circuit acquires pixel data from the pixel array, and the comparison circuit compares the pixel data with the test signals. If the pixel data does not correspond to the test signals, the comparison circuit outputs an error signal. Additional comparison circuits are provided to detect defects in the control circuitry of an image sensor.

    Abstract translation: 一种新颖的图像传感器包括像素阵列,行控制电路,测试信号注入电路,采样电路,图像处理电路,比较电路和控制电路。 在特定实施例中,测试信号注入电路将测试信号注入到像素阵列中,采样电路从像素阵列获取像素数据,并且比较电路将像素数据与测试信号进行比较。 如果像素数据不对应于测试信号,则比较电路输出误差信号。 提供附加的比较电路来检测图像传感器的控制电路中的缺陷。

    CONVERSION CIRCUITRY FOR REDUCING PIXEL ARRAY READOUT TIME
    17.
    发明申请
    CONVERSION CIRCUITRY FOR REDUCING PIXEL ARRAY READOUT TIME 有权
    用于减少像素阵列读取时间的转换电路

    公开(公告)号:US20140183333A1

    公开(公告)日:2014-07-03

    申请号:US13728716

    申请日:2012-12-27

    Inventor: Robert Johansson

    CPC classification number: H04N5/378 H03M1/123 H03M1/466

    Abstract: An image sensor includes a pixel array having pixels arranged in rows and columns, a first successive-approximation-register (“SAR”) analog-to-digital-converter (“ADC”), a second SAR ADC, and first and second control circuitry. The first SAR ADC includes a first capacitor array (“FCA”) that shares a first common terminal coupled to a first comparator and coupled to receive first analog pixel signals. The second SAR ADC includes a second capacitor array (“SCA”) that shares a second common terminal selectably coupled to a second comparator and coupled to receive second analog pixel signals. The first and second control modules are coupled to selectably switch bottom plates of the FCA from a low reference voltage to the high reference voltage at a same time as selectably switching bottom plates of the SCA from a high reference voltage to the low reference voltage.

    Abstract translation: 图像传感器包括具有以行和列排列的像素的像素阵列,第一逐次逼近寄存器(“SAR”)模拟数字转换器(“ADC”),第二SAR ADC以及第一和第二控制 电路。 第一SAR ADC包括共享耦合到第一比较器并被耦合以接收第一模拟像素信号的第一公共端的第一电容器阵列(“FCA”)。 第二SAR ADC包括共享第二公共端子的第二电容器阵列(“SCA”),该第二公共端可选择地耦合到第二比较器并被耦合以接收第二模拟像素信号。 第一和第二控制模块耦合到可选择地将FCA的底板从低参考电压切换到高参考电压,同时可选地将SCA的底板从高参考电压切换到低参考电压。

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