DATA STORAGE WITH INCREMENTAL REDUNDANCY
    12.
    发明申请
    DATA STORAGE WITH INCREMENTAL REDUNDANCY 有权
    数据存储与增量冗余

    公开(公告)号:US20080282106A1

    公开(公告)日:2008-11-13

    申请号:US12119069

    申请日:2008-05-12

    IPC分类号: G06F11/16

    CPC分类号: G06F11/1068 G11C2029/0411

    摘要: A method for operating a memory includes encoding input data with an Error Correction Code (ECC) to produce input encoded data including first and second sections, such that the ECC is decodable based on the first section at a first redundancy, and based on both the first and the second sections at a second redundancy that is higher than the first redundancy.Output encoded data is read and a condition is evaluated. The input data is reconstructed using a decoding level selected, responsively to the condition, from a first level, at which a first part of the output encoded data corresponding to the first section is processed to decode the ECC at the first redundancy, and a second level, at which the first part and a second part of the output encoded data corresponding to the second section are processed jointly to decode the ECC at the second redundancy.

    摘要翻译: 一种用于操作存储器的方法包括用错误校正码(ECC)编码输入数据以产生包括第一和第二部分的输入编码数据,使得基于第一冗余部分的第一部分可以解码ECC,并且基于两者 第一和第二部分具有高于第一冗余的第二冗余。 读取输出编码数据并评估条件。 输入数据使用从第一级别选择的解码级别来重构,在第一级别处理对应于第一部分的输出编码数据的第一部分被处理以在第一冗余处解码ECC,以及第二级 级别,其中对应于第二部分的输出编码数据的第一部分和第二部分共同处理,以在第二冗余处对ECC进行解码。

    Data storage with incremental redundancy
    13.
    发明授权
    Data storage with incremental redundancy 有权
    具有增量冗余的数据存储

    公开(公告)号:US08234545B2

    公开(公告)日:2012-07-31

    申请号:US12119069

    申请日:2008-05-12

    IPC分类号: G06F11/00

    CPC分类号: G06F11/1068 G11C2029/0411

    摘要: A method for operating a memory includes encoding input data with an Error Correction Code (ECC) to produce input encoded data including first and second sections, such that the ECC is decodable based on the first section at a first redundancy, and based on both the first and the second sections at a second redundancy that is higher than the first redundancy.Output encoded data is read and a condition is evaluated. The input data is reconstructed using a decoding level selected, responsively to the condition, from a first level, at which a first part of the output encoded data corresponding to the first section is processed to decode the ECC at the first redundancy, and a second level, at which the first part and a second part of the output encoded data corresponding to the second section are processed jointly to decode the ECC at the second redundancy.

    摘要翻译: 一种用于操作存储器的方法包括用错误校正码(ECC)对输入数据进行编码以产生包括第一和第二部分的输入编码数据,使得基于第一冗余部分的第一部分可以解码ECC,并且基于两者 第一和第二部分具有高于第一冗余的第二冗余。 读取输出编码数据并评估条件。 输入数据使用从第一级别选择的解码级别来重构,在第一级别处理对应于第一部分的输出编码数据的第一部分被处理以在第一冗余处解码ECC,以及第二级 级别,其中对应于第二部分的输出编码数据的第一部分和第二部分共同处理,以在第二冗余处对ECC进行解码。

    Estimation of non-linear distortion in memory devices
    14.
    发明授权
    Estimation of non-linear distortion in memory devices 有权
    存储器件非线性失真的估计

    公开(公告)号:US08060806B2

    公开(公告)日:2011-11-15

    申请号:US11995813

    申请日:2007-08-27

    IPC分类号: G11C29/00

    摘要: A method for operating a memory (24) includes storing data in analog memory cells (32) of the memory by writing respective analog values to the analog memory cells. A set of the analog memory cells is identified, including an interfered cell having a distortion that is statistically correlated with the respective analog values of the analog memory cells in the set. A mapping is determined between combinations of possible analog values of the analog memory cells in the set and statistical characteristics of composite distortion levels present in the interfered memory cell. The mapping is applied so as to compensate for the distortion in the interfered memory cell.

    摘要翻译: 一种用于操作存储器(24)的方法包括通过将相应的模拟值写入模拟存储器单元来将数据存储在存储器的模拟存储器单元(32)中。 识别一组模拟存储器单元,包括具有与组中的模拟存储器单元的相应模拟值统计相关的失真的干扰单元。 在存在于受干扰存储器单元中的复合失真级的集合和统计特性中的模拟存储器单元的可能模拟值的组合之间确定映射。 应用映射以补偿受干扰的存储单元中的失真。

    Programming of analog memory cells using a single programming pulse per state transition
    15.
    发明授权
    Programming of analog memory cells using a single programming pulse per state transition 有权
    使用每个状态转换的单个编程脉冲对模拟存储器单元进行编程

    公开(公告)号:US07924587B2

    公开(公告)日:2011-04-12

    申请号:US12388528

    申请日:2009-02-19

    IPC分类号: G11C27/00

    摘要: A method for data storage in analog memory cells includes defining multiple programming states for storing data in the analog memory cells. The programming states represent respective combinations of more than one bit and correspond to respective, different levels of a physical quantity stored in the memory cells. The data is stored in the memory cells by applying to the memory cells programming pulses that cause the levels of the physical quantity stored in the memory cells to transition between the programming states, such that a given transition is caused by only a single programming pulse.

    摘要翻译: 一种用于在模拟存储单元中进行数据存储的方法包括定义用于在模拟存储器单元中存储数据的多个编程状态。 编程状态表示多于一个位的相应组合,并且对应于存储在存储器单元中的物理量的相应不同级别。 通过向存储器单元施加编程脉冲将数据存储在存储器单元中,编程脉冲使存储单元中存储的物理量的电平在编程状态之间转变,使得给定的转换仅由单个编程脉冲引起。

    Interference mitigation using individual word line erasure operations
    17.
    发明授权
    Interference mitigation using individual word line erasure operations 有权
    使用单个字线擦除操作进行干扰减轻

    公开(公告)号:US08493781B1

    公开(公告)日:2013-07-23

    申请号:US13192504

    申请日:2011-07-28

    IPC分类号: H01L27/115

    摘要: A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells. The data is stored in a first group of the memory cells by programming a second group of the memory cells so as to cause the second group to generate interference in the first group, and individually erasing the first group while verifying that analog levels of the memory cells in the first group subject to the interference are within a predefined bound following erasure. After erasing the first group, the first group of the memory cells is programmed with the data.

    摘要翻译: 一种用于数据存储的方法包括接收用于存储在包括多个模拟存储器单元的存储器中的数据。 通过对第二组存储器单元进行编程,将数据存储在第一组存储器单元中,以使第二组在第一组中产生干扰,并且在验证存储器的模拟电平的同时单独地擦除第一组 经受干扰的第一组中的单元在擦除之后在预定义的界限内。 擦除第一组后,第一组存储单元用数据编程。

    ESTIMATION OF NON-LINEAR DISTORTION IN MEMORY DEVICES
    18.
    发明申请
    ESTIMATION OF NON-LINEAR DISTORTION IN MEMORY DEVICES 有权
    记忆装置中非线性失真的估计

    公开(公告)号:US20100131826A1

    公开(公告)日:2010-05-27

    申请号:US11995813

    申请日:2007-08-27

    摘要: A method for operating a memory (24) includes storing data in analog memory cells (32) of the memory by writing respective analog values to the analog memory cells. A set of the analog memory cells is identified, including an interfered cell having a distortion that is statistically correlated with the respective analog values of the analog memory cells in the set. A mapping is determined between combinations of possible analog values of the analog memory cells in the set and statistical characteristics of composite distortion levels present in the interfered memory cell. The mapping is applied so as to compensate for the distortion in the interfered memory cell.

    摘要翻译: 一种用于操作存储器(24)的方法包括通过将相应的模拟值写入模拟存储器单元来将数据存储在存储器的模拟存储器单元(32)中。 识别一组模拟存储器单元,包括具有与组中的模拟存储器单元的相应模拟值统计相关的失真的干扰单元。 在存在于受干扰存储器单元中的复合失真级的集合和统计特性中的模拟存储器单元的可能模拟值的组合之间确定映射。 应用映射以补偿受干扰的存储单元中的失真。

    Reducing Distortion Using Joint Storage
    19.
    发明申请
    Reducing Distortion Using Joint Storage 有权
    使用联合存储减少失真

    公开(公告)号:US20120163080A1

    公开(公告)日:2012-06-28

    申请号:US13412780

    申请日:2012-03-06

    IPC分类号: G11C16/04

    摘要: A method for data storage includes predefining an order of programming a plurality of analog memory cells that are arranged in rows. The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order.

    摘要翻译: 一种用于数据存储的方法包括预先定义以行排列的多个模拟存储器单元的编程顺序。 该顺序指定对于在第一和第二侧具有相邻行的给定行,只有当至少一个侧面上的相邻行中的存储器单元处于擦除状态时,给定行中的存储器单元被编程,并且该 给定行中的存储器单元被编程为假设最高编程电平,其对应于单元的编程电平中的最大模拟值,只有在编程给定行中的所有存储器单元之后才采用除 最高水平。 根据预定义的顺序对存储器单元进行编程,将数据存储在存储器单元中。

    PROGRAMMING AND ERASURE SCHEMES FOR ANALOG MEMORY CELLS
    20.
    发明申请
    PROGRAMMING AND ERASURE SCHEMES FOR ANALOG MEMORY CELLS 有权
    模拟记忆细胞的编程和擦除方案

    公开(公告)号:US20120224423A1

    公开(公告)日:2012-09-06

    申请号:US13471484

    申请日:2012-05-15

    IPC分类号: G11C16/04

    摘要: A method for data storage, in a memory that includes multiple analog memory cells, includes setting a parameter of an iterative process applied to a group of the memory cells based on one or more data values stored in at least one of the memory cells in the memory. The iterative process is performed in the group of the memory cells in accordance with the set parameter.

    摘要翻译: 一种用于在包括多个模拟存储器单元的存储器中的数据存储的方法,包括基于存储在存储器单元中的至少一个存储器单元中的一个或多个数据值来设置应用于一组存储器单元的迭代过程的参数 记忆。 根据设定的参数在存储单元组中执行迭代处理。