Surge current compensating circuit and comparator module

    公开(公告)号:US09696737B2

    公开(公告)日:2017-07-04

    申请号:US14739259

    申请日:2015-06-15

    Inventor: Han-Chi Liu

    CPC classification number: G05F1/56 H02H9/025 H02M2003/1566

    Abstract: A surge current compensating circuit has a compensating current generation unit and a bias unit, for compensating a surge current drawn from a supply power after an output signal of a specific circuit transits. The compensating current generation unit electrically coupled to the output stage of the specific circuit draws a compensating current form the supply power according to the output signal. The compensating current substantially equals to the surge current, and a summation of a current flowing through the output stage of the specific circuit and the compensating current is substantially unchanged regardless whether the output signal transits or not. The bias unit electrically coupled to the compensating current generation unit provides a bias to the compensating current generation unit to receive the compensating current passed through the compensating current generation unit or output the compensating current to the compensating current generation unit.

    Pixel circuit outputting pulse width signal and optical sensor using the same

    公开(公告)号:US11792550B2

    公开(公告)日:2023-10-17

    申请号:US18071477

    申请日:2022-11-29

    CPC classification number: H04N25/772 H01L27/14643

    Abstract: There is provided a pixel circuit for performing analog operation including a photodiode, a first temporal circuit, a second temporal circuit and an operation circuit. Within a first interval, the photodiode detects first light energy to be stored in the first temporal circuit. Within a second interval, the photodiode detects second light energy to be stored in the second temporal circuit. Within an operation interval, the first temporal circuit outputs a first detection signal having a first pulse width according to the first light energy and outputs a second detection signal having a second pulse width according to the second light energy for being calculated by the operation circuit.

    Image sensor apparatus and method capable of rapidly reading out and processing pixel voltages of pixel array

    公开(公告)号:US11012653B2

    公开(公告)日:2021-05-18

    申请号:US16601541

    申请日:2019-10-14

    Abstract: A method of image sensor apparatus includes: providing pixel array having pixel units arranged in M rows and N columns; providing N parallel column readout circuits each being arranged for reading out pixel data of one corresponding column; disposing a horizontal shift register in row direction coupled to the N parallel column readout circuits, to receive a pulse signal and a clock signal, sequentially shift a phase of the pulse signal according to the clock signal, and scan a corresponding column according to the shifted phase of the pulse signal; and using a column select circuit having N latches to receive a power down digital control signal transmitted from a microcontroller wherein the power down digital control signal is used to disable at least one column readout circuit to enable and select a portion of the set of N parallel column readout circuits.

    IMAGE SENSOR APPARATUS AND METHOD CAPABLE OF RAPIDLY READING OUT AND PROCESSING PIXEL VOLTAGES OF PIXEL ARRAY

    公开(公告)号:US20210112215A1

    公开(公告)日:2021-04-15

    申请号:US16601541

    申请日:2019-10-14

    Abstract: A method of image sensor apparatus includes: providing pixel array having pixel units arranged in M rows and N columns; providing N parallel column readout circuits each being arranged for reading out pixel data of one corresponding column; disposing a horizontal shift register in row direction coupled to the N parallel column readout circuits, to receive a pulse signal and a clock signal, sequentially shift a phase of the pulse signal according to the clock signal, and scan a corresponding column according to the shifted phase of the pulse signal; and using a column select circuit having N latches to receive a power down digital control signal transmitted from a microcontroller wherein the power down digital control signal is used to disable at least one column readout circuit to enable and select a portion of the set of N parallel column readout circuits.

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