摘要:
The transport protocol for communicating between general purpose processors acting as contact points and network processors in a packet processing environment such as Ethernet is provided. In such an environment, there is at least one single control point processor (CP) and a plurality of network processors (NP), sometimes referred to as blades. A typical system could contain two to sixteen network processors, and each network processor connects to a plurality of devices which communicate with each other over a network transport, such as Ethernet. The CP typically controls the functionality and the functioning of the network processors to function in a way that connects one end user with another, whether or not the end user is on the same network processor or a different network processor. There are three types of communication provided; first, there is communication generally referred to as control services and normally there will be only one pico processor which operates as a GCH (guided cell handler) and only one that operates as a guided tree handler (GTH). A path is provided for the controls to the GCH and the GTH commands, and a separate path is provided for the data frames between the GDH's (general data handler) and the CP.
摘要:
A network switch apparatus, components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation among a plurality of interface processors and a suite of peripheral elements formed on a semiconductor substrate. The interface processors and peripherals together form a network processor capable of cooperating with other elements including an optional switching fabric device in executing instructions directing the flow of data in a network.
摘要:
A network switch apparatus, components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation of a plurality of memory elements and a plurality of interface processors formed on a semiconductor substrate. The memory elements and interface processors together form a network processor capable of cooperating with other elements in executing instructions directing the flow of data in a network. Access to the memory elements is controlled in a particular manner and under operative rules which provide controlled multiple accesses of the plurality of memory elements by the plurality of processors.
摘要:
A method and system for systematically accessing and monitoring operating parameter signals within an IC device. A probe configuration logic selects a subset of signals from among a set of available signals within a physical or logical subdivision of the IC device. Signal access logic selectively provides physical or logical access from the selected subset of signals within the physical or logical subdivision of the IC device to a probe sensor, such that IC device operations may be flexibly and comprehensively monitored. A local mode selector provides remote access to the selected subset of signals at an input/output (I/O) data interface. Data packaging logic in communication with the probe sensor permits port mirroring of the I/O data interface.
摘要:
A system and method of moving information units from a network processor toward a data transmission network in a prioritized sequence which accommodates several different levels of service. The present invention includes a method and system for scheduling the egress of processed information units (or frames) from a network processing unit according to stored priorities associated with the various sources of the information units. A system for allowing peak bursts based on a system of credits and charges is taught along limits on such peak bursts. Also taught is a system for preventing a flow's disconnection and reconnection to the queues from allowing it to unfairly achieve an improved position.
摘要:
A system and method of altering frames being processed by a network processing unit. The system includes a set of defined alterations, with some of the alterations being fixed alterations which are advantageously handled by hardware to accomplish the fixed alterations rapidly and without executing a stored program and other alterations which include a variable portion, with these variable alterations being accomplished through the use of stored programs allowing the variables to be used to effect variable alterations to a frame. The present system accommodates a change in the duration of life of a frame or information unit and addition or deletion of bits and also allows for a new cyclic redundancy checking to be accomplished for a revised information unit. Advantageously, the frame alteration system is on the same substrate as the processors.
摘要:
Novel data structures, methods and apparatus for finding a full match between a search pattern and a pattern stored in a leaf of the search tree. A key is input, a hash function is performed on the key, a direct table (DT) is accessed, and a tree is walked through pattern search control blocks (PSCBs) until reaching a leaf. The search mechanism uses a set of data structures that can be located in a few registers and regular memory, and then used to build a Patricia tree structure that can be manipulated by a relatively simple hardware macro. Both keys and corresponding information needed for retrieval are stored in the Patricia tree structure. The hash function provides an n->n mapping of the bits of the key to the bits of the hash key.
摘要:
A system and method of transmitting multiple output messages from a single input message system where the system is keeping the messages in order by correlating the output messages with the input messages. For each output message, an indicator is associated with the output message indicating whether this output message is the last message being generated for the given input message. This allows multicasting to occur in a system where the output is matched to the input by allowing multiple output messages to be associated with a single input message.
摘要:
A method for integrating Asynchronous Transfer Mode (ATM) and frame-based traffic flows within a telecommunications network is disclosed. The telecommunications network includes a network processor having upside processing means for delivering an incoming flow from the telecommunications network to a switch and downside processing means for delivering outgoing network traffic from the switch to the telecommunications network. The incoming flow is initially received at the upside processing means as a frame-based flow. The incoming flow may be characterized as belonging to a group having frame-based flows and ATM flows. In response to the receipt of the incoming flow, the incoming flow is determined if it is destined for a legacy, ATM-only device. The incoming flow is then processed according to the determined routing requirements and the incoming flow characterization before delivering the incoming flow to the switch.
摘要:
A bandwidth conserving queue manager for a FIFO buffer is provided, preferably on an ASIC chip and preferably including separate DRAM storage that maintains a FIFO queue which can extend beyond the data storage space of the FIFO buffer to provide additional data storage space as needed. FIFO buffers are used on the ASIC chip to store and retrieve multiple queue entries. As long as the total size of the queue does not exceed the storage available in the buffers, no additional data storage is needed. However, when some predetermined amount of the buffer storage space in the FIFO buffers is exceeded, data are written to and read from the additional data storage, and preferably in packets which are of optimum size for maintaining peak performance of the data storage device and which are written to the data storage device in such a way that they are queued in a first-in, first-out (FIFO) sequence of addresses. Preferably, the data are written to and are read from the DRAM in burst mode.