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    TRANSPARENT PIXEL FORMAT CONVERTER
    11.
    发明申请
    TRANSPARENT PIXEL FORMAT CONVERTER 有权
    透明像素格式转换器

    公开(公告)号：US20160098813A1

    公开(公告)日：2016-04-07

    申请号：US14504047

    申请日：2014-10-01

    Applicant: QUALCOMM Incorporated

    Inventor： Sudeep Ravi Kottilingal ,  Moinul Khan ,  Colin Christopher Sharp

    IPC: G06T1/60 ,  G06F12/10

    CPC classification number: G06T1/60 ,  G06F12/1036 ,  G06F12/109 ,  G06F2212/657 ,  G06T1/20 ,  G06T2200/28

    Abstract: A transparent format converter (TFC) may determine that a request by at least one processor for graphics data stored in graphics memory is indicative of a request for graphics data in a first data format. The TFC may retrieve the graphics data in a second data format from the graphics memory based at least in part on the request for the graphics data in the graphics memory. The TFC may convert the retrieved graphics data from the second data format to the first data format. The TFC may store the converted graphics data in the first data format into a memory that is accessible by the at least one processor.

    Abstract translation: 透明格式转换器（TFC）可以确定由至少一个处理器对存储在图形存储器中的图形数据的请求指示以第一数据格式的图形数据的请求。 至少部分地基于对图形存储器中的图形数据的请求，TFC可以从图形存储器检索第二数据格式的图形数据。 TFC可以将检索到的图形数据从第二数据格式转换为第一数据格式。 TFC可以将转换后的图形数据以第一数据格式存储到由至少一个处理器可访问的存储器中。

    INTER-PROCESSOR COMMUNICATION TECHNIQUES IN A MULTIPLE-PROCESSOR COMPUTING PLATFORM
    12.
    发明申请
    INTER-PROCESSOR COMMUNICATION TECHNIQUES IN A MULTIPLE-PROCESSOR COMPUTING PLATFORM 有权
    多处理器计算平台中的处理器间通信技术

    公开(公告)号：US20150097849A1

    公开(公告)日：2015-04-09

    申请号：US14570974

    申请日：2014-12-15

    Applicant: QUALCOMM Incorporated

    Inventor： Alexei Vladimirovich Bourd ,  Colin Christopher Sharp ,  David Rigel Garcia Garcia ,  Chihong Zhang

    IPC: G06F9/54 ,  G06T1/60 ,  G06T1/20

    CPC classification number: G06F9/544 ,  G06F9/54 ,  G06F9/546 ,  G06T1/20 ,  G06T1/60

    Abstract: This disclosure describes communication techniques that may be used within a multiple-processor computing platform. The techniques may, in some examples, provide software interfaces that may be used to support message passing within a multiple-processor computing platform that initiates tasks using command queues. The techniques may, in additional examples, provide software interfaces that may be used for shared memory inter-processor communication within a multiple-processor computing platform. In further examples, the techniques may provide a graphics processing unit (GPU) that includes hardware for supporting message passing and/or shared memory communication between the GPU and a host CPU.

    Abstract translation: 本公开描述了可以在多处理器计算平台内使用的通信技术。 在一些示例中，这些技术可以提供软件接口，其可以用于支持使用命令队列发起任务的多处理器计算平台内的消息传递。 在另外的示例中，这些技术可以提供可用于多处理器计算平台内的共享存储器处理器间通信的软件接口。 在另外的示例中，这些技术可以提供图形处理单元（GPU），其包括用于支持GPU和主机CPU之间的消息传递和/或共享存储器通信的硬件。

    HARDWARE ENFORCED CONTENT PROTECTION FOR GRAPHICS PROCESSING UNITS
    16.
    发明申请
    HARDWARE ENFORCED CONTENT PROTECTION FOR GRAPHICS PROCESSING UNITS 审中-公开
    硬件执行图形处理单元的内容保护

    公开(公告)号：US20170039381A1

    公开(公告)日：2017-02-09

    申请号：US14821174

    申请日：2015-08-07

    Applicant: QUALCOMM Incorporated

    Inventor： Colin Christopher Sharp ,  Ramesh Viswanathan

    IPC: G06F21/62 ,  G06F3/06 ,  G06F21/10 ,  G06T1/20 ,  G06T1/60

    CPC classification number: G06F21/6218 ,  G06F3/0622 ,  G06F3/0634 ,  G06F3/0673 ,  G06F21/10 ,  G06T1/20 ,  G06T1/60 ,  G06T2200/28

    Abstract: This disclosure proposes techniques for graphics processing. In one example, a graphics processing unit (GPU) is configured to access a memory according to one of an unsecure mode and a secure mode. The GPU may include a memory access controller configured to direct memory transactions from at least one hardware unit of the GPU to an unsecure memory unit or a secure memory unit based on the unsecure mode or secure mode and a resource descriptor associated with a memory resource.

    Abstract translation: 本公开提出了用于图形处理的技术。 在一个示例中，图形处理单元（GPU）被配置为根据不安全模式和安全模式之一访问存储器。 GPU可以包括存储器访问控制器，其被配置为基于不安全模式或安全模式以及与存储器资源相关联的资源描述符将GPU从至少一个硬件单元引导到不安全存储器单元或安全存储器单元。

    Conditional page fault control for page residency
    17.
    发明授权
    Conditional page fault control for page residency 有权
    页面驻留的条件页面错误控制

    公开(公告)号：US09489313B2

    公开(公告)日：2016-11-08

    申请号：US14035643

    申请日：2013-09-24

    Applicant: QUALCOMM Incorporated

    Inventor： David A. Gotwalt ,  Thomas Edwin Frisinger ,  Andrew Evan Gruber ,  Eric Demers ,  Colin Christopher Sharp

    IPC: G06F12/00 ,  G06F12/10 ,  G06F12/08 ,  G06T1/60

    CPC classification number: G06F12/1009 ,  G06F12/08 ,  G06F2212/302 ,  G06T1/60

    Abstract: The present disclosure provides for systems and methods to process a non-resident page that may include attempting to access the non-resident page, an address for the non-resident page pointing to a memory page containing default values, determining that the non-resident page should not cause a page fault based on an indicator indicating that a particular non-resident page should not generate a page fault, returning an indication that a memory read did not translate and returning the default value when the access of the non-resident page is a read and the non-resident page should not cause a page fault. Another example may discontinue a write when the access of the non-resident page is a write and the non-resident page should not cause a page fault.

    Abstract translation: 本公开提供了处理非居民页面的系统和方法，其可以包括尝试访问非驻留页面，非居民页面的地址指向包含默认值的存储器页面，确定非居民页面 页面不应基于指示特定非驻留页面不应生成页面错误的指示符，返回指示，读取的存储器未翻译并在非驻留页面的访问时返回默认值 是一个读取，非驻留页面不应该导致页面错误。 当非驻留页面的访问是写入而非驻留页面不应导致页面错误时，另一个示例可能会中断写入。

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