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公开(公告)号：US11380471B2
公开(公告)日：2022-07-05
申请号：US16034653
申请日：2018-07-13
Applicant: QUALCOMM Incorporated
Inventor： Daniel Daeik Kim , Bonhoon Koo , Babak Nejati
Abstract: A spiral inductor includes a spiral trace and a plurality of first projections extending along a first edge of the spiral trace. The spiral inductor may further include a plurality of second projections extending along a second edge of the spiral trace, the second edge being opposite the first edge.
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Patent Agency Ranking
12.发明授权公开(公告)号：US12009292B2
公开(公告)日：2024-06-11
申请号：US17547093
申请日：2021-12-09
Applicant: QUALCOMM Incorporated
Inventor： Nosun Park , Changhan Hobie Yun , Daniel Daeik Kim , Paragkumar Ajaybhai Thadesar , Sameer Sunil Vadhavkar
IPC: H01L23/522 , H01L49/02
CPC classification number: H01L23/5223 , H01L23/5227 , H01L28/10 , H01L28/40
Abstract: An integrated circuit (IC) includes a substrate and a first metal-insulator-metal (MIM) capacitor. The first MIM capacitor includes a first plate comprising a first metallization layer on a surface of the substrate. The first MIM capacitor also includes a first MIM insulator layer on a first portion of a surface of the first plate, a sidewall of the first plate, and a first portion of the surface of the substrate. The first MIM capacitor further includes a second plate on the first MIM insulator layer and on a second portion of the surface of the substrate, the second plate comprising a second metallization layer. The IC also includes an inductor comprising a portion of the second plate on the second portion of the surface of the substrate.
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公开(公告)号：US11770115B2
公开(公告)日：2023-09-26
申请号：US17235131
申请日：2021-04-20
Applicant: QUALCOMM Incorporated
Inventor： Changhan Hobie Yun , Hannu Laurila , Ville Lehtisalo , Ville Herman Brunou , Daniel Daeik Kim , Paragkumar Ajaybhai Thadesar , Nosun Park , Wei Cheng
CPC classification number: H03J3/20 , H03H3/00 , H03H7/0123 , H04B1/18
Abstract: An exemplary tunable circuit includes an inductor coupled to a node and a first capacitor coupled to the node. The tunable circuit also includes a variable capacitor coupled to the node, such that a total capacitance of the tunable circuit depends on a fixed capacitance of the first capacitor and a variable capacitance of the variable capacitor. In an example, the inductor and the first capacitor are both included in a passive device and the variable capacitor is in a semiconductor device. The variable capacitor allows the total capacitance to be modified for the purpose of, for example, calibrating the capacitance to account for manufacturing variations, and/or adjusting to a frequency range of operation used by wireless devices in a region of the world. The first capacitor may be a higher quality capacitor providing a larger portion of the total capacitance than the variable capacitor.
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公开(公告)号：US20220123735A1
公开(公告)日：2022-04-21
申请号：US17235131
申请日：2021-04-20
Applicant: QUALCOMM Incorporated
Inventor： Changhan Hobie Yun , Hannu Laurila , Ville Lehtisalo , Ville Herman Brunou , Daniel Daeik Kim , Paragkumar Ajaybhai Thadesar , Nosun Park , Wei Cheng
Abstract: An exemplary tunable circuit includes an inductor coupled to a node and a first capacitor coupled to the node. The tunable circuit also includes a variable capacitor coupled to the node, such that a total capacitance of the tunable circuit depends on a fixed capacitance of the first capacitor and a variable capacitance of the variable capacitor. In an example, the inductor and the first capacitor are both included in a passive device and the variable capacitor is in a semiconductor device. The variable capacitor allows the total capacitance to be modified for the purpose of, for example, calibrating the capacitance to account for manufacturing variations, and/or adjusting to a frequency range of operation used by wireless devices in a region of the world. The first capacitor may be a higher quality capacitor providing a larger portion of the total capacitance than the variable capacitor.
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公开(公告)号：US11011461B2
公开(公告)日：2021-05-18
申请号：US16254735
申请日：2019-01-23
Applicant: QUALCOMM Incorporated
Inventor： Shu Zhang , Daniel Daeik Kim , Chenqian Gan , Bonhoon Koo , Babak Nejati
IPC: H01L23/522 , H01L49/02 , H01F27/28 , H01F41/04 , H01L23/64 , H01F17/02 , H01F17/00 , H01L23/498
Abstract: Some features pertain to a substrate, and a first inductor integrated into the substrate. The first inductor includes a plurality of first inductor windings in a first metal layer and a second metal layer. A second inductor is integrated into the substrate. The second inductor includes a first spiral in a third metal layer. The first spiral is located at least partially inside the plurality of first inductor windings, wherein the second inductor is perpendicular to the first inductor.
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公开(公告)号：US20190189327A1
公开(公告)日：2019-06-20
申请号：US16210594
申请日：2018-12-05
Applicant: QUALCOMM Incorporated
Inventor： Daniel Daeik Kim , Bonhoon Koo , Babak Nejati
CPC classification number: H01F17/0013 , H01F27/365 , H01F41/041 , H01F2017/002 , H01F2017/008 , H04B1/40
Abstract: A vertical inductor structure includes a first laminate substrate forming a first portion of the vertical inductor structure and a second laminate substrate forming a second portion. Each laminate substrate includes a plurality of first traces embedded in a layer of the laminate substrate, a plurality of first vertical columns, and a plurality of second vertical columns. Each first vertical columns is coupled to a first end of a respective first trace, and each second vertical column is coupled to a second end of a respective first trace. The second laminate substrate is mounted on the first laminate substrate such that each first vertical column of the first laminate substrate is coupled to a respective first vertical column of the second laminate substrate, and each second vertical column of the first laminate substrate is coupled to a respective second vertical column of the second laminate substrate.
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