公开(公告)号：US11817239B2

公开(公告)日：2023-11-14

申请号：US16210594

申请日：2018-12-05

Applicant: QUALCOMM Incorporated

Inventor： Daniel Daeik Kim ,  Bonhoon Koo ,  Babak Nejati

IPC: H01F27/36 ,  H01F17/00 ,  H01F41/04 ,  H04B1/40 ,  H04B1/04

CPC classification number: H01F17/0013 ,  H01F27/363 ,  H01F41/041 ,  H04B1/40 ,  H01F27/36 ,  H01F2017/002 ,  H01F2017/008 ,  H04B1/04

Abstract: A vertical inductor structure includes a first laminate substrate forming a first portion of the vertical inductor structure and a second laminate substrate forming a second portion. Each laminate substrate includes a plurality of first traces embedded in a layer of the laminate substrate, a plurality of first vertical columns, and a plurality of second vertical columns. Each first vertical columns is coupled to a first end of a respective first trace, and each second vertical column is coupled to a second end of a respective first trace. The second laminate substrate is mounted on the first laminate substrate such that each first vertical column of the first laminate substrate is coupled to a respective first vertical column of the second laminate substrate, and each second vertical column of the first laminate substrate is coupled to a respective second vertical column of the second laminate substrate.

公开(公告)号：US10319694B2

公开(公告)日：2019-06-11

申请号：US15233902

申请日：2016-08-10

Applicant: QUALCOMM Incorporated

Inventor： Daniel Daeik Kim ,  Jie Fu ,  Manuel Aldrete ,  Jonghae Kim ,  Changhan Hobie Yun ,  David Francis Berdy ,  Chengjie Zuo ,  Mario Francisco Velez

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L21/56 ,  H01L23/48 ,  H01L23/498

Abstract: A semiconductor device according to some examples of the disclosure may include a package substrate, a semiconductor die coupled to one side of the package substrate with a first set of contacts on an active side of the semiconductor die and coupled to a plurality of solder prints with a second set of contacts on a back side of the semiconductor die. The semiconductor die may include a plurality of vias connecting the first set of contacts to the second set of contacts and configured to allow heat to be transferred from the active side of the die to the plurality of solder prints for a shorter heat dissipation path.

公开(公告)号：US12016247B2

公开(公告)日：2024-06-18

申请号：US17005168

申请日：2020-08-27

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  Nosun Park ,  Daniel Daeik Kim ,  Paragkumar Ajaybhai Thadesar ,  Sameer Sunil Vadhavkar

IPC: H10N30/00 ,  H03H9/02

CPC classification number: H10N30/1051 ,  H03H9/02015 ,  H03H9/02535

Abstract: A package that includes an integrated device, an integrated passive device and a void. The integrated device is configured as a filter. The integrated device includes a substrate comprising a piezoelectric material, and at least one metal layer coupled to a first surface of the first substrate. The integrated passive device is coupled to the integrated device. The integrated passive device is configured as a cap for the integrated device. The void is located between the integrated device and the integrated passive device.

公开(公告)号：US11502652B2

公开(公告)日：2022-11-15

申请号：US16870383

申请日：2020-05-08

Applicant: QUALCOMM Incorporated

Inventor： Daniel Daeik Kim ,  Paragkumar Ajaybhai Thadesar ,  Changhan Hobie Yun ,  Sameer Sunil Vadhavkar ,  Nosun Park

IPC: H03F3/14 ,  H03F3/213 ,  H01L23/34 ,  H01L23/66 ,  H03F1/56 ,  H03F3/195

Abstract: A device that includes a substrate and a power amplifier coupled to the substrate. The substrate includes at least one dielectric layer, a plurality of interconnects, and a capacitor configured to operate as an output match element, where the capacitor is defined by a plurality of capacitor interconnects. The power amplifier is coupled to the capacitor. The capacitor is configured to operate as an output match element for the power amplifier. The substrate includes an inductor coupled to the capacitor, where the inductor is defined by at least one inductor interconnect. The capacitor and the inductor are configured to operate as a resonant trap or an output match element.

公开(公告)号：US20220246552A1

公开(公告)日：2022-08-04

申请号：US17166430

申请日：2021-02-03

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  Daniel Daeik Kim ,  Paragkumar Ajaybhai Thadesar ,  Nosun Park ,  Sameer Sunil Vadhavkar

IPC: H01L23/66 ,  H01L23/64 ,  H01L49/02

Abstract: Mobile phones and other mobile devices communicate wirelessly by transmitting and receiving RF signals. Transmitters and receivers in wireless devices process RF signals in certain frequency ranges or bands. Signals in other frequencies can be blocked or filtered out by, for example, a lumped-element circuit or a lumped-element filter consisting of passive electrical components such as inductors, capacitors, and resistors. A passive component device, or integrated passive device, is one example of a lumped-element filter fabricated with passive components on a die. In a mobile device, a passive component device and one or more integrated circuits or other chips used for signal processing are interconnected by being mounted on (i.e., coupled to) a metallization structure or package substrate in a chip module or multi-chip module. The demand for miniaturization of hand-held mobile devices drives a need for reducing the sizes of chip modules that are inside a mobile device.

公开(公告)号：US11239158B1

公开(公告)日：2022-02-01

申请号：US17066154

申请日：2020-10-08

Applicant: QUALCOMM Incorporated

Inventor： Paragkumar Ajaybhai Thadesar ,  Changhan Hobie Yun ,  Sameer Sunil Vadhavkar ,  Daniel Daeik Kim ,  Francesco Carrara

IPC: H01L23/522 ,  H01L23/66 ,  H01L23/00

Abstract: An integrated circuit (IC) package comprising a first die, including an active layer opposite a backside surface of the first die supporting a plurality of backside pads is provided. The IC package also incorporates a package substrate coupled to the active layer. The package pads on the package substrate correspond to the plurality of backside pads. A passive device comprising a plurality of wire bonds is coupled to the plurality of backside pads and the plurality of package pads. The passive device may also comprise a plurality of wire bonds coupled to the package pads by through silicon vias (TSVs). Multiple dies may be coupled with die-to-die wire bonds coupled to backside pads on each die.

公开(公告)号：US10903240B2

公开(公告)日：2021-01-26

申请号：US16402713

申请日：2019-05-03

Applicant: QUALCOMM Incorporated

Inventor： Shiqun Gu ,  Daniel Daeik Kim ,  Matthew Michael Nowak ,  Jonghae Kim ,  Changhan Hobie Yun ,  Je-Hsiung Jeffrey Lan ,  David Francis Berdy

IPC: H01L27/12 ,  H01L23/498 ,  H01L21/84 ,  H01L21/8234 ,  H01L21/304 ,  H01L27/088 ,  H01L23/66 ,  H01L21/306 ,  H01L21/762 ,  H01L21/768 ,  H01L23/528 ,  H01L27/092 ,  H01L29/10 ,  H01L29/66

Abstract: An integrated circuit (IC) includes a glass substrate and a buried oxide layer. The IC additionally includes a first semiconductor device coupled to the glass substrate. The first semiconductor device includes a first gate and a first portion of a semiconductive layer coupled to the buried oxide layer. The first gate is located between the glass substrate and the first portion of the semiconductive layer and between the glass substrate and the buried oxide layer. The IC additionally includes a second semiconductor device coupled to the glass substrate. The second semiconductor device includes a second gate and a second portion of the semiconductive layer. The second gate is located between the glass substrate and the second portion of the semiconductive layer. The first portion is discontinuous from the second portion.

公开(公告)号：US11728293B2

公开(公告)日：2023-08-15

申请号：US17166430

申请日：2021-02-03

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  Daniel Daeik Kim ,  Paragkumar Ajaybhai Thadesar ,  Nosun Park ,  Sameer Sunil Vadhavkar

IPC: H01L23/64 ,  H01L23/66 ,  H01L49/02

CPC classification number: H01L23/66 ,  H01L23/645 ,  H01L28/10

Abstract: Mobile phones and other mobile devices communicate wirelessly by transmitting and receiving RF signals. Transmitters and receivers in wireless devices process RF signals in certain frequency ranges or bands. Signals in other frequencies can be blocked or filtered out by, for example, a lumped-element circuit or a lumped-element filter consisting of passive electrical components such as inductors, capacitors, and resistors. A passive component device, or integrated passive device, is one example of a lumped-element filter fabricated with passive components on a die. In a mobile device, a passive component device and one or more integrated circuits or other chips used for signal processing are interconnected by being mounted on (i.e., coupled to) a metallization structure or package substrate in a chip module or multi-chip module. The demand for miniaturization of hand-held mobile devices drives a need for reducing the sizes of chip modules that are inside a mobile device.

公开(公告)号：US11658403B2

公开(公告)日：2023-05-23

申请号：US17002594

申请日：2020-08-25

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  Daniel Daeik Kim ,  Paragkumar Ajaybhai Thadesar ,  Nosun Park ,  Sameer Sunil Vadhavkar

IPC: H01Q9/04 ,  H01Q1/38 ,  H01Q13/02 ,  H01Q21/28 ,  H04B3/52 ,  H04B3/56

CPC classification number: H01Q1/38 ,  H01Q13/02 ,  H01Q21/28 ,  H04B3/52 ,  H04B3/56

Abstract: A substrate that includes at least one dielectric layer, a plurality of interconnects, and a curved antenna coupled to a surface of the substrate. The curved antenna is curved relative to the surface of the substrate such that at least part of the curved antenna is offset from the surface of the substrate. The substrate includes a first antenna dielectric layer coupled to the surface of the substrate, an antenna ground interconnect coupled to the first antenna dielectric layer, and a second antenna dielectric layer coupled to the antenna ground interconnect. The antenna ground interconnect configured to be coupled to ground. The curved antenna is coupled to the second antenna dielectric layer.

公开(公告)号：US11515247B2

公开(公告)日：2022-11-29

申请号：US17149006

申请日：2021-01-14

Applicant: QUALCOMM Incorporated

Inventor： Nosun Park ,  Changhan Hobie Yun ,  Daniel Daeik Kim ,  Sameer Sunil Vadhavkar ,  Paragkumar Ajaybhai Thadesar

IPC: H01L23/52 ,  H01L23/522 ,  H01L21/70 ,  H01L27/01

Abstract: A device includes a main capacitor composed of a first plate of a first back-end-of-line (BEOL) metallization layer, a main insulator layer on the first plate, and a second plate on the main insulator layer. The second plate is composed of a second BEOL metallization layer. The device includes a first tuning capacitor of a first portion of a first BEOL interconnect trace coupled to the first plate of the main capacitor through first BEOL sideline traces. The first tuning capacitor is composed of a first insulator layer on a surface and sidewalls of the first portion of the first BEOL interconnect trace. The first tuning capacitor includes a second BEOL interconnect trace on a surface and sidewalls of the first insulator layer. The device includes a first via capture pad coupled to the second BEOL interconnect trace of the first tuning capacitor.