公开(公告)号：US20170270496A1

公开(公告)日：2017-09-21

申请号：US15602058

申请日：2017-05-22

Applicant: Dyron Clower ,  John Templer ,  La Shonna Sharp ,  Aaron Calipari ,  Michael Ring ,  Michael Serrette ,  Nickolas Ledford ,  Lawrence Dugger ,  Rodney Drake ,  Diana Hayes

Inventor： Dyron Clower ,  John Templer ,  La Shonna Sharp ,  Aaron Calipari ,  Michael Ring ,  Michael Serrette ,  Nickolas Ledford ,  Lawrence Dugger ,  Rodney Drake ,  Diana Hayes

IPC: G06Q20/10

CPC classification number: G06Q20/1085 ,  G06Q20/042 ,  G06Q20/3223 ,  G06Q20/40145 ,  G06Q20/4016 ,  G06Q20/405 ,  G06Q40/02

Abstract: A real-time system and method for determining whether to invoke a fraud alert notification to a bank concerning an account holder or an item issuer following an interim determination that the account holder or item issuer has participated in a fraudulent transaction. An interim determination is updated based in part on bank transaction data received following the interim determination.

公开(公告)号：US06230275B1

公开(公告)日：2001-05-08

申请号：US09232053

申请日：1999-01-15

Applicant: Joseph W. Triece ,  Rodney Drake ,  Igor Wojewoda

Inventor： Joseph W. Triece ,  Rodney Drake ,  Igor Wojewoda

IPC: G06F126

CPC classification number: G11C5/14 ,  G11C7/1045 ,  H03K19/0016

Abstract: A system for powering down configuration circuits to minimize power consumption has at least one first configuration circuit for configuring a peripheral module. A second configuration circuit is coupled to the peripheral module and to the at least one first configuration circuit. The second configuration circuit is used for enabling and disabling the peripheral module. The second configuration circuit is further used to power down the at least one first configuration circuit to minimize current consumption of the at least one first configuration circuit when the peripheral module is disabled.

Abstract translation: 用于断电配置电路以最小化功耗的系统具有用于配置外围模块的至少一个第一配置电路。 第二配置电路耦合到外围模块和至少一个第一配置电路。 第二个配置电路用于启用和禁用外围模块。 当外围模块被禁用时，第二配置电路还用于断电至少一个第一配置电路以最小化至少一个第一配置电路的电流消耗。

公开(公告)号：US5861861A

公开(公告)日：1999-01-19

申请号：US671575

申请日：1996-06-28

Applicant: James B. Nolan ,  Scott Ellison ,  Brian Boles ,  Rodney Drake ,  Russell E. Cooper

Inventor： James B. Nolan ,  Scott Ellison ,  Brian Boles ,  Rodney Drake ,  Russell E. Cooper

IPC: G02F1/133 ,  G06F3/147 ,  G09G3/00 ,  G09G3/18 ,  G09G3/36 ,  G09G5/00 ,  H02M3/07

CPC classification number: H02M3/07 ,  G06F3/147 ,  G09G3/18 ,  G09G3/006 ,  G09G3/3696 ,  G09G5/001

Abstract: Apparatus for providing multiple of discrete voltage levels to drive a liquid crystal display (LCD) from an LCD module on board a microcontroller chip includes a charge pump with a switched-capacitor that develops the discrete voltages as multiples of the value of a base voltage that remains substantially without change irrespective of change in the supply voltage. A switched-capacitor charging circuit selectively charges a capacitor to produce successive additive charges individually retrievable from the capacitor. An LCD drive selectively transmits the discrete voltage levels to activate the LCD according to status of an external system under the control of the microcontroller. Voltage losses that may occur during the switched-capacitor charging are compensated to maintain the levels of the discrete voltages free of decay. Compensation is achieved by overcharging the capacitor by an amount substantially equivalent to the amount of voltage loss on the capacitor, using active feedback obtained from monitoring the charge on the capacitor.

Abstract translation: 用于提供多个离散电压电平以从微控制器芯片上的LCD模块驱动液晶显示器（LCD）的装置包括具有开关电容器的电荷泵，其将离散电压开发为基本电压值的倍数 无论电源电压的变化如何，均保持基本无变化。 开关电容器充电电路选择性地对电容器充电以产生可从电容器单独检索的连续的附加电荷。 LCD驱动器根据微控制器的控制，根据外部系统的状态选择性地发送离散电压电平以激活LCD。 在开关电容器充电期间可能发生的电压损耗被补偿以保持离散电压的电平没有衰减。 通过使用从监视电容器上的电荷获得的有效反馈，使电容器过充电达到与电容器上的电压损失量相当的量。

公开(公告)号：US5469557A

公开(公告)日：1995-11-21

申请号：US26967

申请日：1993-03-05

Applicant: Tom Salt ,  Rodney Drake

Inventor： Tom Salt ,  Rodney Drake

IPC: G11C8/20 ,  G11C16/22 ,  G06F12/14 ,  H04L9/00

CPC classification number: G11C8/20 ,  G11C16/22

Abstract: A semiconductor microcontroller device is adapted to control the operation of an external system. The device includes a CPU, program memory for storing instructions to be executed by the CPU to perform its control functions, and data memory for storing data for selective retrieval by the CPU. The contents of either memory are code protected by an EEPROM fuse, and are automatically erased if the code protect state of the EEPROM fuse is sought to be reset, and the EEPROM fuse is reset only after the erasure of the memory contents.

Abstract translation: 半导体微控制器装置适于控制外部系统的操作。 该设备包括CPU，用于存储要由CPU执行以执行其控制功能的指令的程序存储器，以及用于存储用于CPU选择性检索的数据的数据存储器。 任何一个存储器的内容均由EEPROM保险丝进行代码保护，如果要求复位EEPROM保险丝的代码保护状态，并且只有擦除存储器内容之后EEPROM保险丝才会被复位。

公开(公告)号：US07206924B2

公开(公告)日：2007-04-17

申请号：US10751210

申请日：2003-12-31

Applicant: Edward Brian Boles ,  Rodney Drake ,  Darrel Johansen ,  Sumit Mitra ,  Joseph Triece ,  Randy Yach

Inventor： Edward Brian Boles ,  Rodney Drake ,  Darrel Johansen ,  Sumit Mitra ,  Joseph Triece ,  Randy Yach

IPC: G06F12/08

CPC classification number: G06F9/30192 ,  G06F9/30032 ,  G06F9/3004 ,  G06F9/30101 ,  G06F9/3012 ,  G06F9/3013 ,  G06F9/30145 ,  G06F9/30149 ,  G06F9/30167 ,  G06F9/321 ,  G06F9/325

Abstract: A microcontroller apparatus is provided with an instruction set for manipulating the behavior of the microcontroller. The apparatus and system is provided that enables a linearized address space that makes modular emulation possible. Direct or indirect addressing is possible through register files or data memory. Special function registers, including the Program Counter (PC) and Working Register (W), are mapped in the data memory. An orthogonal (symmetrical) instruction set makes possible any operation on any register using any addressing mode. Consequently, two file registers to be used in some two operand instructions. This allows data to be moved directly between two registers without going through the W register. Thus increasing performances and decreasing program memory usage.

Abstract translation: 微控制器装置设置有用于操纵微控制器的行为的指令集。 提供了使得能够实现模块化仿真的线性化地址空间的装置和系统。 可以通过寄存器文件或数据存储器进行直接或间接寻址。 特殊功能寄存器，包括程序计数器（PC）和工作寄存器（W），映射到数据存储器中。 正交（对称）指令集可以使用任何寻址模式对任何寄存器进行任何操作。 因此，在两个操作数指令中要使用两个文件寄存器。 这允许在两个寄存器之间直接移动数据，而不经过W寄存器。 从而增加性能并减少程序内存的使用。

公开(公告)号：US06339413B1

公开(公告)日：2002-01-15

申请号：US08671933

申请日：1996-06-28

Applicant: Rodney Drake ,  Brian Boles

Inventor： Rodney Drake ,  Brian Boles

IPC: G09G318

CPC classification number: G06F1/3265 ,  G06F1/3203 ,  G09G3/18 ,  Y02D10/153

Abstract: A device including a microcontroller fabricated on a semiconductor chip is used to control an LCD display of an external system intended to be controlled by the microcontroller. The microcontroller enters a sleep state in which it operates in a battery power conservation mode during periods of time when functional activity of the microcontroller is reduced. The microcontroller awakens from the sleep state for resumption of activity when such a period ends. Timing to the LCD is decoupled from the microcontroller's own internal clock when the independent internal on-chip clock, which may be an RC oscillator, is selected by the user of the device. This allows the chip to continue to drive the LCD display even though the microcontroller's internal clock has stopped during the sleep.

Abstract translation: 包括在半导体芯片上制造的微控制器的器件用于控制旨在由微控制器控制的外部系统的LCD显示器。 微控制器进入睡眠状态，其中它在电池功率节省模式下操作，在微控制器的功能活动减小的时间段内。 当这样的时间段结束时，微控制器从休眠状态唤醒以恢复活动。 当独立的内部片内时钟（可能是RC振荡器）由设备的用户选择时，LCD的定时与微控制器自己的内部时钟分离。 即使在休眠期间微控制器的内部时钟已经停止，这样就可以使芯片继续驱动LCD显示。

公开(公告)号：US5870409A

公开(公告)日：1999-02-09

申请号：US671011

申请日：1996-06-28

Applicant: Randy Yach ,  Rodney Drake

Inventor： Randy Yach ,  Rodney Drake

IPC: G01R31/00 ,  G02F1/13 ,  G02F1/133 ,  G06F11/267 ,  G09G3/00 ,  G09G3/36 ,  H04N5/66 ,  G01R31/28

CPC classification number: G09G3/006 ,  G06F11/2221

Abstract: A method is disclosed for testing a high speed microcontroller fabricated on a semiconductor chip, and for testing relatively low speed functions of a liquid crystal display (LCD) module on the chip that drives an off-chip LCD for an external system to be controlled by the microcontroller with a plurality of discrete analog voltage levels for performing the LCD functions. Digital values are multiplexed in time slots of a test waveform to simulate in high speed digital format of a test mode the low speed timing, relative magnitude and functionality of analog voltage levels used to drive the LCD; A high speed driver is selectively coupled to a pin of the chip, to which the discrete analog voltage levels are normally applied at low speed to drive the LCD, and the test waveform is applied to the high speed driver. The digital values and timing that appear on the pin are then monitored as an indication of proper functionality of the LCD module. The high speed driver is switched out and the normal low speed LCD driver is switched back for return to an LCD user mode when the test mode is completed. Monitoring the pin with a digital tester allows verification that pin pulses in predetermined time slots indicate the corresponding analog voltage level is being applied at the proper time during normal operation of the LCD module, and digitally testing of continuity in an analog channel. A transistor normally employed on the chip for electrostatic discharge protection is activated to selectively couple the high speed driver to the pin for the high speed testing mode.

Abstract translation: 公开了一种用于测试在半导体芯片上制造的高速微控制器的方法，并且用于测试芯片上的液晶显示器（LCD）模块的相对低速功能，该芯片驱动用于外部系统的片外LCD以由 具有用于执行LCD功能的多个离散模拟电压电平的微控制器。 数字值在测试波形的时隙中进行多路复用，以模拟用于驱动LCD的模拟电压电平的低速定时，相对幅度和功能的测试模式的高速数字格式; 选择性地将高速驱动器耦合到芯片的引脚，通过低速驱动分立的模拟电压电平来驱动LCD，测试波形被施加到高速驱动器。 然后监视引脚上出现的数字值和时序作为LCD模块正常功能的指示。 当测试模式完成时，高速驱动器被切换并且正常的低速LCD驱动器被切回以返回到LCD用户模式。 使用数字测试仪监控引脚，可以验证在预定时隙内的引脚脉冲表示在LCD模块正常工作期间的适当时间正在施加相应的模拟电压电平，并对模拟通道的连续性进行数字测试。 通常在芯片上用于静电放电保护的晶体管被​​激活以选择性地将高速驱动器耦合到用于高速测试模式的引脚。