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公开(公告)号：US07542042B1
公开(公告)日：2009-06-02
申请号：US10985575
申请日：2004-11-10
CPC分类号： G06T1/20 , G06F9/5044 , G06T15/005 , G09G5/14 , G09G2360/121 , G09G2360/18
摘要： A new method of operating a fragment shader to produce complex video content comprised of a video image or images, such as from a DVD player, that overlays a fragment shader-processed background. Pixels are fragment shader-processed during one loop or set of loops through a texture processing stations to produce a fragment shader-processed background. Then, at least some of those pixels are merged with the video or images to produce complex video content. The resulting complex image is then made available for further processing.
摘要翻译： 操作片段着色器以产生由视频图像或诸如DVD播放器的图像组成的复杂视频内容的新方法，其叠加片段着色器处理的背景。 像素是通过纹理处理站的一个循环或一组循环中的片段着色器处理，以产生片段着色器处理的背景。 然后，这些像素中的至少一些与视频或图像合并以产生复杂的视频内容。 然后使得到的复杂图像可用于进一步处理。
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公开(公告)号：US08223150B2
公开(公告)日：2012-07-17
申请号：US13193524
申请日：2011-07-28
申请人： Brian Cabral , Amy J. Migdal , Rui M. Bastos , Karim M. Abdalla
发明人： Brian Cabral , Amy J. Migdal , Rui M. Bastos , Karim M. Abdalla
CPC分类号： G06T15/50 , G06F8/441 , G06T15/005 , G06T2210/32
摘要： An apparatus and method for translating fixed function state into a shader program. Fixed function state is received and stored and when a new shader program is detected the fixed function state is translated into shader program instructions. Registers specified by the program instructions are allocated for processing in the shader program. The registers may be remapped for more efficient use of the register storage space.
摘要翻译： 一种用于将固定功能状态转换为着色器程序的装置和方法。 固定功能状态被接收和存储，当检测到新的着色器程序时，固定功能状态被转换为着色器程序指令。 由程序指令指定的寄存器被分配给着色器程序中的处理。 可以重新映射寄存器以更有效地使用寄存器存储空间。
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公开(公告)号：US08004523B1
公开(公告)日：2011-08-23
申请号：US11966905
申请日：2007-12-28
申请人： Brian Cabral , Amy J. Migdal , Rui M. Bastos , Karim M. Abdalla
发明人： Brian Cabral , Amy J. Migdal , Rui M. Bastos , Karim M. Abdalla
CPC分类号： G06T15/50 , G06F8/441 , G06T15/005 , G06T2210/32
摘要： An apparatus and method for translating fixed function state into a shader program. Fixed function state is received and stored and when a new shader program is detected the fixed function state is translated into shader program instructions. Registers specified by the program instructions are allocated for processing in the shader program. The registers may be remapped for more efficient use of the register storage space.
摘要翻译： 一种用于将固定功能状态转换为着色器程序的装置和方法。 固定功能状态被接收和存储，当检测到新的着色器程序时，固定功能状态被转换成着色器程序指令。 由程序指令指定的寄存器被分配给着色器程序中的处理。 可以重新映射寄存器以更有效地使用寄存器存储空间。
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公开(公告)号：US07609272B1
公开(公告)日：2009-10-27
申请号：US11010972
申请日：2004-12-13
申请人： Emmett M. Kilgariff , Rui M. Bastos
发明人： Emmett M. Kilgariff , Rui M. Bastos
CPC分类号： G06T15/005 , G06T15/04 , G06T15/80 , G09G5/363 , G09G2360/06 , G09G2360/18
摘要： Circuits, methods, and apparatus that provide for partial texture load instructions. Instead of one instruction that may take several shader passes to complete, several instructions are issued, where each instruction is an instruction to retrieve a part or portion of a texture. While each instruction is performed, the other shader circuits can perform other instructions, thus increasing the utilization of the shader circuits when large textures are read from memory. Since several shader passes may be required to read a texture, if a particular instruction needs the texture, one exemplary embodiment reorders instructions such that other instructions are performed before the particular instruction that needs the texture.
摘要翻译： 提供部分纹理加载指令的电路，方法和设备。 代替一个可能需要几个着色器遍的指令，就会发出几条指令，其中每条指令都是一条用于检索纹理的一部分或部分的指令。 当执行每条指令时，其他着色器电路可以执行其他指令，从而在从存储器读取大纹理时增加着色器电路的利用率。 由于读取纹理可能需要几个着色器遍，如果特定指令需要纹理，则一个示例性实施例重新排列指令，使得在需要纹理的特定指令之前执行其他指令。
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公开(公告)号：US07825936B1
公开(公告)日：2010-11-02
申请号：US10993700
申请日：2004-11-19
CPC分类号： G06T1/20
摘要： A method and system for optimizing graphics program execution by allowing the sharing of shader resources is disclosed. The method includes accessing a graphics program using a shader pipeline. If a texture projective instruction is included in the graphics program, a determination is made as to whether a texture projective parameter q indicates a non-projective texture. If the texture projective parameter indicates a non-projective texture, the texture projective instruction is demoted and a resulting demoted texture instruction is executed using a plurality of interpolators of the shader pipeline, which requires fewer shader resources.
摘要翻译： 公开了通过允许共享着色器资源来优化图形程序执行的方法和系统。 该方法包括使用着色器管线访问图形程序。 如果图形程序中包括纹理投影指令，则确定纹理投影参数q是否表示非投影纹理。 如果纹理投影参数指示非投影纹理，则纹理投影指令被降级，并且使用着色器流水线的多个内插器执行结果降级的纹理指令，这需要较少的着色器资源。
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公开(公告)号：US07486290B1
公开(公告)日：2009-02-03
申请号：US11149717
申请日：2005-06-10
IPC分类号： G06F15/00
CPC分类号： G06T15/005 , G06T2210/52
摘要： A graphical shader and a method of distributing graphical data to shader pipelines in a graphical shader are disclosed. In accordance with the method, a shader pipeline input delay is set. Further, a group of the graphical data is distributed to a shader pipeline of the graphical shader to be processed. The method includes waiting for the shader pipeline input delay to elapse. After the shader pipeline input delay has elapsed, another group of the graphical data is distributed to another shader pipeline of the graphical shader to be processed. In another embodiment, a graphical shader includes a plurality of shader pipelines for processing graphical data. Further, the graphical shader includes a shader distributor for distributing a group of the graphical data to one of the shader pipelines and for distributing another group of the graphical data to another one of the shader pipelines after a shader pipeline input delay has elapsed.
摘要翻译： 公开了一种图形着色器和在图形着色器中将图形数据分配到着色器管线的方法。 根据该方法，设置着色器管线输入延迟。 此外，一组图形数据被分配到要处理的图形着色器的着色器管线。 该方法包括等待着色器流水线输入延迟过去。 在着色器流水线输入延迟已经过去之后，另一组图形数据被分配到要处理的图形着色器的另一个着色器流水线。 在另一个实施例中，图形着色器包括用于处理图形数据的多个着色器管线。 此外，图形着色器包括着色器分配器，用于将一组图形数据分配到着色器管道中的一个，并且在着色器流水线输入延迟已经过去之后，将另一组图形数据分配给另一个着色器管线。
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公开(公告)号：US07916151B1
公开(公告)日：2011-03-29
申请号：US12603903
申请日：2009-10-22
申请人： Emmett M. Kilgariff , Rui M. Bastos
发明人： Emmett M. Kilgariff , Rui M. Bastos
CPC分类号： G06T15/005 , G06T15/04 , G06T15/80 , G09G5/363 , G09G2360/06 , G09G2360/18
摘要： Circuits, methods, and apparatus that provide for partial texture load instructions. Instead of one instruction that may take several shader passes to complete, several instructions are issued, where each instruction is an instruction to retrieve a part or portion of a texture. While each instruction is performed, the other shader circuits can perform other instructions, thus increasing the utilization of the shader circuits when large textures are read from memory. Since several shader passes may be required to read a texture, if a particular instruction needs the texture, one exemplary embodiment reorders instructions such that other instructions are performed before the particular instruction that needs the texture.
摘要翻译： 提供部分纹理加载指令的电路，方法和设备。 代替一个可能需要几个着色器遍的指令，就会发出几条指令，其中每条指令都是一条用于检索纹理的一部分或部分的指令。 当执行每条指令时，其他着色器电路可以执行其他指令，从而在从存储器读取大纹理时增加着色器电路的利用率。 由于读取纹理可能需要几个着色器遍，如果特定指令需要纹理，则一个示例性实施例重新排列指令，使得在需要纹理的特定指令之前执行其他指令。
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公开(公告)号：US07490208B1
公开(公告)日：2009-02-10
申请号：US10959560
申请日：2004-10-05
IPC分类号： G06F13/372 , G06F12/00
CPC分类号： G06F13/372
摘要： Architecture for compact multi-ported register file is disclosed. In an embodiment, a register file comprises a single-port random access memory (RAM). The single-port RAM comprises a single port for read operations and for write operations. Either a single read or a single write operation is performed for a given clock via the single port. Moreover, the single-port RAM serially performs N read operations and M write operations associated with a data group using a clock phase of (N+M) clock phases generated from a clock. In another embodiment, a semiconductor device includes the architecture for compact multi-ported register file. The semiconductor device comprises a plurality of register files. Each register file comprises a RAM comprising a port for read operations and for write operations. Moreover, each RAM serially performs N read operations and M write operations associated with one of a plurality of data groups using a corresponding clock phase of (N+M) clock phases generated from a clock. Further, the semiconductor device comprises an input staging unit for staging write data of one or more of the write operations. Continuing, the semiconductor device comprises an output staging unit for staging read data of one or more of the read operations. The semiconductor device can be a graphics processing unit (GPU).
摘要翻译： 公开了用于紧凑型多端口寄存器堆的架构。 在一个实施例中，寄存器文件包括单端口随机存取存储器（RAM）。 单端口RAM包括用于读取操作和写入操作的单个端口。 通过单个端口对给定的时钟执行单个读取或单个写入操作。 此外，单端口RAM使用从时钟产生的（N + M）个时钟相位的时钟相位来串行地执行与数据组相关联的N个读取操作和M个写入操作。 在另一个实施例中，半导体器件包括用于紧凑型多端口寄存器堆的结构。 半导体器件包括多个寄存器文件。 每个寄存器文件包括RAM，其包括用于读操作和写操作的端口。 此外，每个RAM使用从时钟生成的（N + M）个时钟相位的相应时钟相位，串行地执行与多个数据组之一相关联的N个读取操作和M个写入操作。 此外，半导体器件包括用于对一个或多个写入操作的写入数据进行分级的输入分段单元。 继续地，半导体器件包括用于对读取操作中的一个或多个读取数据进行分级的输出分段单元。 半导体器件可以是图形处理单元（GPU）。
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公开(公告)号：US06967663B1
公开(公告)日：2005-11-22
申请号：US10658056
申请日：2003-09-08
CPC分类号： G06T11/40
摘要： Hybrid sampling of pixels of an image involves generating shading values at multiple shading sample locations and generating depth values at multiple depth sample locations, with the number of depth sample locations exceeding the number of shading sample locations. Each shading sample location is associated with one or more of the depth sample locations. Generation and filtering of hybrid sampled pixel data can be done within a graphics processing system, transparent to an application that provides image data.
摘要翻译： 图像的像素的混合采样涉及在多个阴影采样位置处生成阴影值，并在多个深度采样位置生成深度值，深度采样位置的数量超过阴影采样位置的数量。 每个阴影样本位置与一个或多个深度样本位置相关联。 混合采样像素数据的生成和滤波可以在对提供图像数据的应用程序透明的图形处理系统内完成。
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公开(公告)号：US07511717B1
公开(公告)日：2009-03-31
申请号：US11182676
申请日：2005-07-15
CPC分类号： G09G3/2074 , G06T11/40 , G09G5/363 , G09G2320/02 , G09G2340/0414 , G09G2340/0421 , G09G2360/18
摘要： Hybrid sampling of pixels of an image involves generating shading values at multiple shading sample locations and generating depth values at multiple depth sample locations, with the number of depth sample locations exceeding the number of shading sample locations. Each shading sample location is associated with one or more of the depth sample locations. Generation and filtering of hybrid sampled pixel data can be done within a graphics processing system, transparent to an application that provides image data.
摘要翻译： 图像的像素的混合采样涉及在多个阴影采样位置处生成阴影值，并在多个深度采样位置生成深度值，深度采样位置的数量超过阴影采样位置的数量。 每个阴影样本位置与一个或多个深度样本位置相关联。 混合采样像素数据的生成和滤波可以在对提供图像数据的应用程序透明的图形处理系统内完成。
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