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公开(公告)号：US20220399428A1
公开(公告)日：2022-12-15
申请号：US17687702
申请日：2022-03-07
发明人： Myoung Geun CHA , Sang Gun CHOI , Tae Wook KANG , Bum Mo SUNG , Yun Jung OH , Yong Su LEE
摘要： A display device includes: a substrate; a transistor disposed on the substrate; a first electrode connected to the transistor; an emission layer disposed on the first electrode; a second electrode disposed on the emission layer; a common voltage line connected to the second electrode; and a third electrode and a fourth electrode disposed between the common voltage line and the second electrode.
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公开(公告)号：US20210151475A1
公开(公告)日：2021-05-20
申请号：US17071579
申请日：2020-10-15
发明人： Sang Sub KIM , Keun Woo KIM , Ji Yeong SHIN , Yong Su LEE , Myoung Geun CHA , Ki Seok CHOI , Sang Gun CHOI
IPC分类号： H01L27/12 , H01L27/32 , G09G3/32 , H01L21/265 , H01L21/225 , H01L21/28
摘要： A display device and method of fabricating the same are provided. The display device includes a substrate and a thin-film transistor formed on the substrate. The thin-film transistor includes a lower gate conductive layer disposed on the substrate, and a lower gate insulating film disposed on the lower gate conductive layer The lower gate insulating film includes an upper surface and sidewalls. The thin-film transistor includes an active layer disposed on the upper surface of the lower gate insulating film, the active layer including sidewalls. At least one of the sidewalls of the lower gate insulating film and at least one of the sidewalls of the active layer are aligned with each other.
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公开(公告)号：US20230232671A1
公开(公告)日：2023-07-20
申请号：US18122174
申请日：2023-03-16
发明人： Joon Woo BAE , Mee Jae KANG , Thanh Tien NGUYEN , Kyoung Won LEE , Yong Su LEE , Jae Seob LEE , Gyoo Chul JO , Myoung Geun CHA
IPC分类号： H10K59/126 , H10K59/131 , H10K59/121
CPC分类号： H10K59/126 , H10K59/131 , H10K59/1213 , H10K59/1216
摘要： An organic light emitting diode display includes a substrate, an overlap layer on the substrate, a semiconductor layer on the overlap layer, a first gate conductor on the semiconductor layer, a second gate conductor on the first gate conductor, a data conductor on the second gate conductor, a driving transistor on the overlap layer, and an organic light emitting diode connected with the driving transistor. The driving transistor includes, in the semiconductor layer, a first electrode, a second electrode, with a channel therebetween. A gate electrode of the first gate conductor overlaps the channel. The overlap layer overlaps the channel of the driving transistor and at least a portion of the first electrode. A storage line of the second gate conductor receives a driving voltage through a driving voltage line in the data conductor. The overlap layer receives a constant voltage.
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14.发明公开公开(公告)号：US20230215954A1
公开(公告)日：2023-07-06
申请号：US18176454
申请日：2023-02-28
发明人： YONG SU LEE , Yoon Ho KHANG , Dong Jo KIM , Hyun Jae NA , Sang Ho PARK , Se Hwan YU , Chong Sup CHANG , Dae Ho KIM , Jae Neung Kim , Myoung Geun CHA , Sang Gab KIM , Yu-Gwang JEONG
IPC分类号： H01L29/786 , H01L27/12 , H01L29/66 , H01L29/417
CPC分类号： H01L29/78633 , H01L29/78618 , H01L27/1288 , H01L27/124 , H01L29/7869 , H01L27/1225 , H01L29/78696 , H01L29/66969 , H01L29/41733 , H10K59/1213
摘要： A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
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公开(公告)号：US20210202655A1
公开(公告)日：2021-07-01
申请号：US17079278
申请日：2020-10-23
发明人： Hyun Min CHO , Tae Wook KANG , Sang Gun CHOI , Shin Il CHOI , Yun Jung OH , Myoung Geun CHA
摘要： A display apparatus includes: a base substrate; a thin film transistor and a power supply wire on the base substrate; a first electrode on the base substrate, and electrically connected to the thin film transistor; a light emitting layer and a common layer on the first electrode; and a second electrode on the common layer. The power supply wire includes: a first conductive layer; a second conductive layer on the first conductive layer; and a third conductive layer on the second conductive layer. The third conductive layer protrudes more than the second conductive layer on a side surface of the power supply wire, and the second electrode contacts a side surface of the second conductive layer.
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16.发明申请THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME 有权薄膜晶体管，包括其的薄膜晶体管阵列面板及其制造方法公开(公告)号：US20150194534A1
公开(公告)日：2015-07-09
申请号：US14666461
申请日：2015-03-24
发明人： Yong Su LEE , Yoon Ho KHANG , Dong Jo KIM , Hyun Jae NA , Sang Ho PARK , Se Hwan YU , Chong Sup CHANG , Dae Ho KIM , Jae Neung KIM , Myoung Geun CHA , Sang Gab KIM , Yu-Gwang JEONG
IPC分类号： H01L29/786 , H01L29/417
CPC分类号： H01L29/78633 , H01L27/1225 , H01L27/124 , H01L27/1288 , H01L27/3262 , H01L29/41733 , H01L29/66969 , H01L29/78618 , H01L29/7869 , H01L29/78696
摘要： A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
摘要翻译： 根据本发明的示例性实施例的薄膜晶体管包括氧化物半导体。 源电极和漏电极彼此面对。 源电极和漏电极分别位于氧化物半导体的两个相对侧。 低导电区域位于源电极或漏电极与氧化物半导体之间。 绝缘层位于氧化物半导体和低导电区域上。 栅电极位于绝缘层上。 绝缘层覆盖氧化物半导体和低导电区域。 低导电区域的载流子浓度低于源电极或漏电极的载流子浓度。
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公开(公告)号：US20240304726A1
公开(公告)日：2024-09-12
申请号：US18665023
申请日：2024-05-15
发明人： Sang Sub KIM , Keun Woo KIM , Ji Yeong SHIN , Yong Su LEE , Myoung Geun CHA , Ki Seok CHOI , Sang Gun CHOI
IPC分类号： H01L29/786 , G09G3/32 , H01L21/225 , H01L21/265 , H01L21/28 , H01L27/12 , H01L29/66 , H10K59/12 , H10K59/121
CPC分类号： H01L29/78603 , H01L27/1274 , H01L29/6675 , H10K59/1213 , G09G3/32 , G09G2300/0809 , H01L21/2253 , H01L21/26533 , H01L21/28158 , H01L27/1255 , H10K59/1201
摘要： A display device and method of fabricating the same are provided. The display device includes a substrate and a thin-film transistor formed on the substrate. The thin-film transistor includes a lower gate conductive layer disposed on the substrate, and a lower gate insulating film disposed on the lower gate conductive layer The lower gate insulating film includes an upper surface and sidewalls. The thin-film transistor includes an active layer disposed on the upper surface of the lower gate insulating film, the active layer including sidewalls. At least one of the sidewalls of the lower gate insulating film and at least one of the sidewalls of the active layer are aligned with each other.
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公开(公告)号：US20230223478A1
公开(公告)日：2023-07-13
申请号：US18122815
申请日：2023-03-17
发明人： Sang Sub KIM , Keun Woo KIM , Ji Yeong SHIN , Yong Su LEE , Myoung Geun CHA , Ki Seok CHOI , Sang Gun CHOI
CPC分类号： H10K59/1201 , H01L29/6675 , H10K59/1213
摘要： A display device and method of fabricating the same are provided. The display device includes a substrate and a thin-film transistor formed on the substrate. The thin-film transistor includes a lower gate conductive layer disposed on the substrate, and a lower gate insulating film disposed on the lower gate conductive layer The lower gate insulating film includes an upper surface and sidewalls. The thin-film transistor includes an active layer disposed on the upper surface of the lower gate insulating film, the active layer including sidewalls. At least one of the sidewalls of the lower gate insulating film and at least one of the sidewalls of the active layer are aligned with each other.
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公开(公告)号：US20230068662A1
公开(公告)日：2023-03-02
申请号：US17982721
申请日：2022-11-08
发明人： Myoung Geun CHA , Sang Gun CHOI , Joon Woo BAE , Ji Yeong SHIN , Yong Su LEE
IPC分类号： H01L51/56 , H01L27/32 , H01L21/308 , H01L51/52
摘要： A display device includes a first transistor including a first active layer, a first gate electrode overlapping the first active layer, a gate insulating layer between the first active layer and the first gate electrode, a first source electrode, and a first drain electrode; a second transistor including a second active layer, a second gate electrode overlapping the second active layer, a second source electrode and a second drain electrode; a capacitor including a first capacitor electrode connected to the second transistor; a lower electrode disposed under the first active layer; a connecting member connecting the first active layer to the lower electrode; and a first metal pattern contacting the connecting member and disposed on a same layer with the first gate electrode.
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公开(公告)号：US20210036268A1
公开(公告)日：2021-02-04
申请号：US17075872
申请日：2020-10-21
发明人： Myoung Geun CHA , Sang Gun CHOI , Joon Woo BAE , Ji Yeong SHIN , Yong Su LEE
IPC分类号： H01L51/56 , H01L27/32 , H01L21/308 , H01L51/52
摘要： A display device includes a first transistor including a first active layer, a first gate electrode overlapping the first active layer, a gate insulating layer between the first active layer and the first gate electrode, a first source electrode, and a first drain electrode; a second transistor including a second active layer, a second gate electrode overlapping the second active layer, a second source electrode and a second drain electrode; a capacitor including a first capacitor electrode connected to the second transistor; a lower electrode disposed under the first active layer; a connecting member connecting the first active layer to the lower electrode; and a first metal pattern contacting the connecting member and disposed on a same layer with the first gate electrode.
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