公开(公告)号：US10818685B2

公开(公告)日：2020-10-27

申请号：US16141163

申请日：2018-09-25

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Mohan Dunga ,  James Kai ,  Venkatesh P. Ramachandra ,  Piyush Dak ,  Luisa Lin ,  Masaaki Higashitani

IPC: G11C11/24 ,  H01L27/11578 ,  G11C16/28 ,  G11C16/24 ,  H01L27/1157 ,  G11C16/08 ,  H01L27/11565 ,  H01L27/11573 ,  G11C16/30

Abstract: A non-volatile storage apparatus comprises a non-volatile memory structure and an I/O interface. A portion of the memory die is used as a pool capacitor for the I/O interface.

公开(公告)号：US20200294909A1

公开(公告)日：2020-09-17

申请号：US16886695

申请日：2020-05-28

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Luisa Lin ,  Mohan Dunga ,  Venkatesh P. Ramachandra ,  Peter Rabkin ,  Masaaki Higashitani

IPC: H01L23/522 ,  H01L23/528 ,  H01L23/00 ,  H01L49/02 ,  H01L27/11582

Abstract: A non-volatile storage apparatus comprises a non-volatile memory structure and a plurality of I/O pads in communication with the non-volatile memory structure. The I/O pads include a power I/O pad, a ground I/O pad and data/control I/O pads. The non-volatile storage apparatus further comprises one or more capacitors connected to the power I/O pad and the ground I/O pad. The one or more capacitors are positioned in one or more metal interconnect layers below the signal lines and/or above device capacitors on the top surface of the substrate.

公开(公告)号：US20200013794A1

公开(公告)日：2020-01-09

申请号：US16141163

申请日：2018-09-25

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Mohan Dunga ,  James Kai ,  Venkatesh P. Ramachandra ,  Piyush Dak ,  Luisa Lin ,  Masaaki Higashitani

IPC: H01L27/11578 ,  G11C16/28 ,  G11C11/24 ,  G11C16/24 ,  G11C16/30 ,  G11C16/08 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/1157

Abstract: A non-volatile storage apparatus comprises a non-volatile memory structure and an I/O interface. A portion of the memory die is used as a pool capacitor for the I/O interface.

公开(公告)号：US10249592B2

公开(公告)日：2019-04-02

申请号：US15898604

申请日：2018-02-18

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Michael Mostovoy ,  Gokul Kumar ,  Ning Ye ,  Hem Takiar ,  Venkatesh P. Ramachandra ,  Vinayak Ghatawade ,  Chih-Chin Liao

IPC: H01L21/78 ,  H01L21/56 ,  H01L25/00 ,  H01L23/00 ,  H01L25/065

Abstract: A wide I/O semiconductor device is disclosed including a memory die stack wire bonded to an interface chip. The stack of memory die may be wire bonded to the interface chip using a wire bond scheme optimized for die-to-die connection and optimized for the large number of wire bond connections in a wide I/O semiconductor device. This method can achieve significant BW increase by improving packaging yield and costs, not possible with current packaging schemes.

公开(公告)号：US20180174996A1

公开(公告)日：2018-06-21

申请号：US15898604

申请日：2018-02-18

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Michael Mostovoy ,  Gokul Kumar ,  Ning Ye ,  Hem Takiar ,  Venkatesh P. Ramachandra ,  Vinayak Ghatawade ,  Chih-Chin Liao

IPC: H01L23/00 ,  H01L21/56 ,  H01L25/00 ,  H01L25/065 ,  H01L21/78

CPC classification number: H01L24/49 ,  H01L21/56 ,  H01L21/78 ,  H01L24/06 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0612 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48499 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/78301 ,  H01L2924/00014 ,  H01L2924/1436 ,  H01L2924/14511 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/01079 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: A wide I/O semiconductor device is disclosed including a memory die stack wire bonded to an interface chip. The stack of memory die may be wire bonded to the interface chip using a wire bond scheme optimized for die-to-die connection and optimized for the large number of wire bond connections in a wide I/O semiconductor device. This method can achieve significant BW increase by improving packaging yield and costs, not possible with current packaging schemes.

公开(公告)号：US09899347B1

公开(公告)日：2018-02-20

申请号：US15454194

申请日：2017-03-09

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Michael Mostovoy ,  Gokul Kumar ,  Ning Ye ,  Hem Takiar ,  Venkatesh P. Ramachandra ,  Vinayak Ghatawade ,  Chih-Chin Liao

IPC: H01L25/065 ,  H01L25/00 ,  H01L23/00 ,  H01L21/56 ,  H01L21/78

CPC classification number: H01L24/49 ,  H01L21/56 ,  H01L21/78 ,  H01L24/06 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0612 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48499 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/78301 ,  H01L2924/00014 ,  H01L2924/1436 ,  H01L2924/14511 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/01079 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: A wide I/O semiconductor device is disclosed including a memory die stack wire bonded to an interface chip. The stack of memory die may be wire bonded to the interface chip using a wire bond scheme optimized for die-to-die connection and optimized for the large number of wire bond connections in a wide I/O semiconductor device. This method can achieve significant BW increase by improving packaging yield and costs, not possible with current packaging schemes.