Abstract:
A clipping detector circuit includes a timer circuit and a counter circuit. The timer circuit is configured to monitor a time period elapsing since a last occurrence of an edge in a PWM signal, assert a first signal when the time period elapses, and de-assert the first signal and reset the time period as a result of an edge occurring in the PWM signal. The counter circuit is configured to determine a number of pulses in the PWM signal since the last de-assertion of the first signal, and assert a second signal when the number of pulses in the PWM signal since the last de-assertion of the first signal reaches m pulses. The clipping detector circuit is configured to generate a clipping detection signal indicative of whether the pulse-width modulated signal is clipped or not as a function of the first signal and the second signal.
Abstract:
In an embodiment, a PWM modulation circuit includes a first circuit block configured to receive a square wave input signal and produce from the square wave input signal a triangular wave signal, a second circuit block configured to receive a modulating signal and produce a PWM signal by comparing the modulating signal with a carrier signal, a switching circuit block coupled between the first circuit block and the second circuit block and sensitive to reference signals having upper and lower reference values and selectively switchable between a carrier transfer setting in which the switching circuit block couples the first circuit block to the second circuit block to transfer the triangular wave signal as the carrier signal, and one or more carrier forcing settings for optimizing or inhibiting pulse skipping in the PWM signal, wherein the switching circuit block forces the carrier signal to the upper and lower reference values, respectively.
Abstract:
In an embodiment, a PWM modulation circuit includes a first circuit block configured to receive a square wave input signal and produce from the square wave input signal a triangular wave signal, a second circuit block configured to receive a modulating signal and produce a PWM signal by comparing the modulating signal with a carrier signal, a switching circuit block coupled between the first circuit block and the second circuit block and sensitive to reference signals having upper and lower reference values and selectively switchable between a carrier transfer setting in which the switching circuit block couples the first circuit block to the second circuit block to transfer the triangular wave signal as the carrier signal, and one or more carrier forcing settings for optimizing or inhibiting pulse skipping in the PWM signal, wherein the switching circuit block forces the carrier signal to the upper and lower reference values, respectively.
Abstract:
A switching amplifier includes a first half-bridge PWM modulator, a second half-bridge PWM modulator, and at least one amplifier stage configured to receive input signals. The switching amplifier also includes a PWM control stage configured to control switching of the first PWM modulator and of the second PWM modulator as a function of the input signals, by respective first PWM control signals and second PWM control signals. The amplifier stage and the PWM control stage have a fully differential structure.
Abstract:
A power electronic device includes first and second electronic switches, each integrated on a package having a low parasitic inductance, a supply terminal and a ground terminal. The first conduction terminal of the first switch may be coupled with the supply terminal, and the second conduction terminal of the second electronic switch may be coupled with the ground terminal. The corresponding control terminals of the switches may be coupled to corresponding pilot drivers. The package may include first and second electric terminals, wherein the second conduction terminal of the first switch is coupled to the first electric terminal, and the first conduction terminal of the second switch is coupled to the second electric terminal. A first inductance may be interposed between the first electric terminal and the output terminal and/or a second inductance interposed between the second electric terminal and the output terminal.
Abstract:
The present invention relates to a method and a circuit for testing a tweeter. The tweeter is part of a loudspeaker system. The method includes the steps of: applying a high-frequency voltage signal to one terminal of the tweeter, whereby the high-frequency voltage signal is generated by first electronic means. The method also includes applying a constant voltage signal to the other terminal of the tweeter, whereby the constant voltage signal is generated by second electronic means. The method includes measuring a current (Iload) that flows through the tweeter into the second electronic means and determining a connect/disconnect state of the tweeter from the value of the current.
Abstract:
An embodiment DC switching converter comprises first and second Zeta converters, each comprising an input stage, an output stage, a first switching stage, and a second switching stage. The input stage of each Zeta converter comprises a respective input inductor having a first terminal electrically coupled to the respective first switching stage. The input inductors of the input stages of the first and second Zeta converters are magnetically coupled in such a way that when current enters the terminal of the input inductor of the first Zeta converter that is coupled to the first switch stage of the first Zeta converter, a voltage induced by the coupled current is positive at the terminal of the input inductor of the second Zeta converter that is coupled to the first switching stage of the second Zeta converter.
Abstract:
An embodiment switching converter comprises an input stage; an output stage for providing an output voltage; a capacitive coupling stage for coupling the input stage to the output stage; a first switching stage configured to switch between a first state where an input voltage is provided to the input stage, and a second state where the input voltage is not provided to the input stage; a second switching stage configured to switch between a first state in which a reference voltage is provided to the output stage, and a second state in which the reference voltage is not provided to the output stage; and a voltage regulation stage configured to set, after the second switching stage switches from the first state to the second state and before the first switching stage switches from the second state to the first state, a target voltage across the input stage.
Abstract:
A switching circuit includes a switching circuit stage configured to supply a load via filter networks. Control circuitry is provided to control alternate switching sequences of transistors in the half-bridges of the switching circuit stage. A current flow line is provided between the output nodes of the half-bridges including an inductance between two switches. First and second capacitances are coupled with the output nodes of the half-bridges. The control circuitry switches first and second switches to the conductive state at intervals in the alternate switching sequences of the transistors in the half-bridges between switching the first pair of transistors to a non-conductive state and switching the second pair of transistors to a conductive state.
Abstract:
An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.